Amorphous Template Layer for Nanowire Growth Direction Control
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Solution Overview
Problem
Conventional semiconductor nanowire fabrication methods rely on non-standard substrates and metal catalysts, increasing costs and compatibility issues, particularly in CMOS manufacturing, and result in orientation-dependent growth directions that are less favorable for integration.
Innovation Solution
A method involving an amorphous template layer with predetermined recess patterns allows for the epitaxial growth of semiconductor nanowires, decoupling their growth direction from the underlying substrate's crystal orientation, enabling the use of standard substrates and eliminating the need for metal catalysts.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional nanowire fabrication methods are used with non-standard substrates, then nanowire growth direction can be controlled, but manufacturing cost increases
Solution Approach 1:
The patent introduces an amorphous template layer as an intermediary between the substrate and the nanowire growth interface. This template layer decouples the nanowire growth direction from the substrate crystal orientation, allowing standard substrates to be used while maintaining controlled nanowire growth directions through patterned recesses in the template layer
Solution Approach 2:
The patent changes the physical state of the template layer from crystalline to amorphous, which eliminates orientation-dependent growth issues. The amorphous nature of the template layer allows it to provide structural guidance without imposing crystallographic constraints on the nanowire growth direction
2Ease of manufacture
If metal catalysts are used in conventional nanowire fabrication, then nanowire growth is enabled, but compatibility with CMOS manufacturing is reduced
Solution Approach 1:
The patent extracts and eliminates the metal catalyst component from the nanowire fabrication process. Instead of using metal particles to catalyze growth, the method employs vapor-phase deposition directly onto the amorphous template layer, removing the source of contamination and incompatibility with CMOS processes
Solution Approach 2:
The patent replaces the chemical catalysis mechanism with a physical vapor deposition mechanism. By using direct vapor-phase growth on the amorphous template, the process substitutes the chemical role of metal catalysts with a physically controlled deposition process that is cleaner and more compatible with CMOS manufacturing
3Ease of manufacture
If standard substrates are used without amorphous template layer, then manufacturing cost is reduced, but nanowire growth direction becomes orientation-dependent
Solution Approach 1:
The patent segments the substrate system into three distinct functional layers: the standard substrate, the amorphous template layer with patterned recesses, and the growing nanowire structure. This segmentation allows each layer to perform its specific function independently, with the template layer mediating between the substrate and nanowire to achieve both cost-effectiveness and growth control
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the fabrication of vertically extending semiconductor nanowires with controlled growth directions, improving integration compatibility and reducing fabrication costs by allowing the use of substrates of any crystal orientation, while ensuring uniformity and compatibility with CMOS processes.
Implementation Method 1
A method involving an amorphous template layer with predetermined recess patterns allows for the epitaxial growth of semiconductor nanowires
Data Source
AI summary
A method of providing an out-of-plane semiconductor structure and a structure fabricated thereby is disclosed. The method comprises acts of: providing a substrate defining a major surface; providing a template layer having a predetermined template thickness on the major surface of the substrate; forming a recess in the template layer having a recess pattern and a recess depth smaller than the template thickness; and epitaxilally growing a semiconductor structure from the recess. A planar shape of the recess pattern formed in the template layer substantially dictates an extending direction of the semiconductor structure.