Amphi-FET Structure With Through-Substrate Gate Routing
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Solution Overview
Problem
As technology nodes shrink, existing three-dimensional integrated circuits (3DICs), fin field effect transistors (FinFETs), and gate all around (GAA) transistors struggle to maintain reduced device area and efficient routing, while backside routing structures face challenges in connecting elements without increasing device size.
Innovation Solution
The amphi-FET structure, which includes active devices on both sides of a substrate, uses conductive elements to electrically connect gate and source/drain contacts through the substrate, eliminating the need for additional routing structures and allowing direct signal transfer between substrate sides, thereby increasing gate density and reducing device size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If interconnect structures are formed on one side of substrate and connected to device on opposite side using TSV, then routing options increase and planar area is reduced, but device complexity and manufacturing difficulty increase
Solution Approach 1:
The patent utilizes the vertical dimension by forming interconnect structures on both the front surface and back surface of the substrate, connected through TSVs. This bidirectional approach effectively doubles the available routing space without increasing planar footprint, resolving the contradiction between routing options and device complexity
Solution Approach 2:
The patent divides the substrate into front and back surfaces, each capable of independent interconnect formation. This segmentation allows routing to be distributed across both surfaces, increasing overall routing capacity while maintaining manageable complexity on each individual surface
2Area of stationary object
If technology nodes continue to shrink, then device area is reduced, but routing becomes more difficult
Solution Approach 1:
By exploiting the third dimension (substrate thickness) and utilizing both front and back surfaces for interconnect formation, the patent provides additional routing pathways without requiring increased planar device area, thus resolving the contradiction between area reduction and routing difficulty
Solution Approach 2:
The substrate serves multiple functions: it acts as both the device platform and the connection medium between front and back interconnect structures. This multi-functionality allows the same physical substrate to support reduced area while providing enhanced routing capabilities through its thickness dimension
Data Source
AI summary
A semiconductor device includes a substrate. The semiconductor device further includes a first gate structure on a first side of the substrate. The semiconductor device further includes a second gate structure on a second side of the substrate, wherein the first side is opposite the second side. The semiconductor device further includes a gate via extending through the substrate, wherein the gate via directly connects to the first gate structure, and the gate via directly connects to the second gate structure.


