Power Amplifier Bias Equalization Near the 1 dB Compression Point

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Solution Overview

Problem

Existing power amplifiers face challenges in achieving good amplitude-to-amplitude (AM-AM) and amplitude-to-phase (AM-PM) metrics while maintaining high power added efficiency (PAE), linearity, and error vector magnitude (EVM) performance.

Innovation Solution

The solution involves a new equalization approach that compensates for AM-AM and AM-PM variations by controlling bias conditions, such as bias voltage, versus output power to alter the AM-AM and AM-PM profiles. This approach is applicable to all frequencies, technologies, and types of amplifiers, including power amplifiers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If operation is performed further away from the 1 dB compression point to reduce AM-AM and AM-PM distortion, then linearity and EVM performance are improved, but power added efficiency (PAE) performance is significantly degraded

Engineering Contradiction:
Improvelinearity and EVM performanceVSAvoidpower added efficiency
Core Design Contradiction:
Manufacturing precisionVSUse of energy by moving object

Solution Approach 1:

The patent applies parameter changes by dynamically adjusting the bias voltage of the amplifier based on the output power level. The bias voltage is modulated to compensate for AM-AM and AM-PM distortions, allowing the amplifier to operate near the 1 dB compression point while maintaining improved linearity and EVM performance. This dynamic parameter adjustment resolves the contradiction by enabling high efficiency operation without sacrificing linearity.

Inventive Principle:
Principle #35Parameter changes

2Manufacturing precision

If digital pre-distortion (DPD) is used to improve linearity and EVM performance, then AM-AM and AM-PM metrics are improved, but feedback loop complexity and circuit complexity increase

Engineering Contradiction:
ImproveAM-AM and AM-PM metricsVSAvoidfeedback loop and circuit complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent extracts and eliminates the complex feedback loop requirement of traditional DPD by using a feedforward bias modulation approach. Instead of requiring output feedback and complex digital processing, the invention uses a simpler circuit that directly modulates the bias voltage based on the input signal power level, achieving similar linearization results without the complexity of feedback loops and digital processors.

Inventive Principle:
Principle #2Taking out (Extraction)

3Manufacturing precision

If high current density is used in IC FET fabrication to achieve good AM-AM and AM-PM metrics, then linearity is improved, but power added efficiency and thermal performance are degraded

Engineering Contradiction:
ImproveAM-AM and AM-PM metricsVSAvoidpower added efficiency
Core Design Contradiction:
Manufacturing precisionVSUse of energy by moving object

Solution Approach 1:

The patent changes the operating parameters by implementing dynamic bias voltage modulation that allows the amplifier to operate at high current density near the 1 dB compression point while maintaining good AM-AM and AM-PM metrics. The bias modulation compensates for the distortions that would otherwise result from high current density operation, enabling both high efficiency and good linearity metrics simultaneously.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS12237813B2Power amplifier equalizer
Publication Date: 2025.02.25 MURATA MFG CO LTD
  • US12237813B2 patent drawing
  • US12237813B2 patent drawing
  • US12237813B2 patent drawing

AI summary

Circuits and methods for achieving good AM-AM and AM-PM metrics while achieving good power, PAE, linearity, and EVM performance in an amplifier. Embodiments provide an equalization approach which compensates for AM-AM and AM-PM variations in an amplifier by controlling bias voltage versus output power to alter the AM-AM and AM-PM profiles imposed by the amplifier. Differential amplifier embodiments include cross-coupled common-gate transistors that generate an equalization voltage that alters the gate bias voltage of respective main FETs in proportion to a power level present at the respective drains of the main FETs. Single-ended amplifier embodiments include an equalization circuit that alters the bias voltage to the gate of a main FET in proportion to a power level present at the main FET drain. Embodiments may also include a linearization circuit which alters the AM-PM profile of an input signal to compensate for the AM-PM profile imposed by a coupled amplifier.