Amplifier Bias Circuit Switching Gate Voltage to Reduce Gate Lag
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Solution Overview
Problem
Existing bias circuits for amplifiers in time domain duplexing (TDD) communication systems suffer from degradation of high-frequency characteristics due to gate lag caused by a large potential difference between the gate and the drain at pinch-off.
Innovation Solution
A bias circuit that includes a first power source generating a first gate voltage for the on state, a voltage generating circuit generating a second gate voltage for the off state using the first gate voltage, and a switching circuit to switch between these voltages based on a changeover signal, thereby reducing the potential difference and preventing high-frequency characteristic degradation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a large potential difference is applied between gate and drain at pinch-off to ensure transistor off state, then the transistor can be reliably turned off, but high-frequency characteristics are degraded due to gate lag
Solution Approach 1:
The bias circuit is segmented into multiple power sources (first power source for set voltage, second power source for pinch-off voltage) with independent control. This allows the set voltage to be optimized for high-frequency characteristics while the pinch-off voltage is separately controlled to ensure reliable transistor off state, resolving the contradiction between reliability and performance.
Solution Approach 2:
The invention changes the bias voltage parameters by introducing a second power source that provides a specifically optimized pinch-off voltage. This pinch-off voltage is set to be higher than conventional values to reduce gate lag while still ensuring transistor off state, thereby improving high-frequency characteristics without sacrificing reliability.
2Manufacturing precision
If set voltage is individually adjusted for each transistor to optimize performance, then high-frequency characteristics improve, but device complexity and adjustment difficulty increase
Solution Approach 1:
The first power source is designed to provide set voltage that can be universally applied to transistors with different characteristics. The power source includes adjustment means that allows a single standardized circuit to be tuned for individual transistor variations, achieving optimized high-frequency characteristics without requiring complex individual circuit designs for each transistor.
Solution Approach 2:
The bias circuit incorporates automatic adjustment mechanisms where the set voltage can be individually tuned for each transistor through the adjustment means, allowing the circuit to self-optimize its performance. This reduces the need for external complex adjustment procedures while maintaining high-frequency characteristics.
3Reliability
If pinch-off voltage is set to guarantee transistor off state considering transistor variations, then reliability improves, but gate lag increases causing high-frequency characteristic degradation
Solution Approach 1:
The invention makes the pinch-off voltage dynamic and adjustable rather than fixed. The second power source includes adjustment means that allow the pinch-off voltage to be optimized for specific transistor characteristics. This dynamic adjustment enables the circuit to maintain reliable transistor off state while minimizing gate lag by selecting appropriate voltage levels for each application.
Data Source
AI summary
A bias circuit according to an example embodiment includes a first power source configured to generate a first gate voltage that puts an amplifying transistor in an on state; a voltage generating circuit configured to generate a second gate voltage by use of the first gate voltage input from the first power source, the second gate voltage putting the amplifying transistor in an off state; a first switching circuit configured to switch between the first gate voltage input to a first input terminal and the second gate voltage input to a second input terminal and to output the first gate voltage or the second gate voltage, based on a changeover signal related to on/off control of the amplifying transistor; and a voltage output terminal configured to output the gate voltage output from the first switching circuit to the amplifying transistor.