High-Frequency Amplifier Bias Switching for Gain and Bypass Modes

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Solution Overview

Problem

Existing high-frequency semiconductor amplifier circuits require numerous switches to switch between gain and bypass modes, leading to increased circuit size and complexity, especially in multi-band applications, which complicates mode switching and increases the size of the circuit.

Innovation Solution

A high-frequency semiconductor amplifier circuit design that uses a bias generation circuit to control transistors for mode switching between gain and bypass modes, reducing the need for additional switches by utilizing transistors to act as switches and capacitors to maintain impedance matching, allowing for efficient switching between modes without additional circuit elements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If numerous switches are added to enable multi-band switching and mode selection, then the adaptability of the amplifier circuit is improved, but the device complexity and circuit size increase significantly

Engineering Contradiction:
Improvemulti-band switching capabilityVSAvoidcircuit complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent makes the existing transistors (Q1, Q2) perform dual functions: they act as amplifying devices in gain mode and as switching devices for mode selection. The bias generation circuit generates different bias voltages to control the transistors' operating states, enabling the same hardware to serve multiple purposes without requiring additional switches for mode selection.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent combines the mode selection function with the existing amplifying transistors by controlling their bias states. Instead of having separate switches for mode selection and amplification, the bias generation circuit integrates both functions by generating appropriate bias voltages that simultaneously control the amplifying and switching behavior of the transistors.

Inventive Principle:
Principle #5Merging (Combining)

2Adaptability or versatility

If numerous switches are added to enable multi-band switching, then the adaptability of the amplifier circuit is improved, but the area of the circuit increases

Engineering Contradiction:
Improvemulti-band switching capabilityVSAvoidcircuit area
Core Design Contradiction:
Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The patent makes the existing transistors (Q1, Q2) perform dual functions: they act as amplifying devices in gain mode and as switching devices for mode selection. The bias generation circuit generates different bias voltages to control the transistors' operating states, enabling the same hardware to serve multiple purposes without requiring additional switches for mode selection.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent combines the mode selection function with the existing amplifying transistors by controlling their bias states. Instead of having separate switches for mode selection and amplification, the bias generation circuit integrates both functions by generating appropriate bias voltages that simultaneously control the amplifying and switching behavior of the transistors.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS10033332B2High-frequency semiconductor amplifier circuit
Publication Date: 2018.07.24 KK TOSHIBA
  • US10033332B2 patent drawing
  • US10033332B2 patent drawing
  • US10033332B2 patent drawing

AI summary

According to an embodiment, a high-frequency semiconductor amplifier circuit includes an input terminal and an output terminal. A gate of a first transistor is connected to the input terminal. A drain of the first transistor is connected to the output terminal. A second transistor is connected between a source of the first transistor and a reference potential terminal. A bias generation circuit has an input control signal terminal, a bias voltage terminal connected to the gate of the first transistor, a control voltage terminal connected to a gate of the second transistor, and an intermediate voltage terminal connected to the drain of the first transistor. The bias generation circuit supplies a control voltage, a bias voltage, and a first voltage according to the input control signal.