Semiconductor Amplifier Terminal Layout for Bias Isolation
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Solution Overview
Problem
Existing high-frequency semiconductor amplifiers experience bias interference due to adjacent bias terminals, leading to unstable output signals in multiple stages of transistors.
Innovation Solution
A semiconductor amplifier design with a package structure that includes a metal bottom plate, insulating circuit board, and side wall, featuring first and second transistors mounted side by side, with matching circuits placed between them, and bias terminals positioned with input or output terminals interposed, preventing direct adjacency and thus minimizing bias interference.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If bias terminals for multiple transistors are placed adjacent to each other on the circuit board, then the device complexity is reduced and manufacturing is simplified, but bias interference occurs between transistors causing unstable output signals
Solution Approach 1:
The patent resolves the terminal arrangement problem by transitioning from a two-dimensional planar layout to a three-dimensional spatial arrangement. Bias terminals for different transistor stages are positioned at opposite ends of the circuit board along the longitudinal axis, utilizing the extended spatial dimension to achieve electrical isolation while maintaining a compact overall device structure. This dimensional approach eliminates bias interference without increasing device complexity.
Solution Approach 2:
The circuit board is segmented into distinct functional regions with bias terminals for different transistor stages separated into isolated zones. The first bias terminal is positioned near the input end while the second bias terminal is positioned near the output end, creating spatial segmentation that prevents electromagnetic coupling and bias interference between transistor stages, thereby ensuring stable output signals.
2Ease of operation
If terminals for multiple functions are concentrated on one side of the circuit board, then the ease of operation is improved, but bias interference occurs between adjacent bias terminals
Solution Approach 1:
The patent distributes terminals along the longitudinal dimension of the circuit board rather than concentrating them on one side. Bias terminals are positioned at opposite ends of the board, utilizing the extended length dimension to achieve both operational convenience and electrical isolation. This approach maintains ease of connection while eliminating the harmful bias interference effect.
Solution Approach 2:
The terminal layout employs asymmetric positioning where bias terminals for different stages are placed at non-adjacent locations along the circuit board. The first bias terminal is positioned at one end while the second bias terminal is positioned at the opposite end, creating an asymmetric arrangement that prevents electromagnetic coupling while maintaining connection convenience.
Data Source
AI summary
A semiconductor amplifier 1 includes transistors 21a and 21b mounted side by side on a bottom plate 2 in a space in a package 6, a matching circuit 22a mounted between the transistors 21a, 21b on the bottom plate 2, a matching circuit 22b mounted on an opposite side of the transistor 21b from the transistor 21a on the bottom plate 2, an input terminal TIN installed on one side of a wiring substrate 3, an output terminal TOUT installed on the other side of the wiring substrate 3, and gate bias terminals T1G and T2G and drain bias terminals T1D and T2D installed at positions with the input terminal TIN and the output terminal TOUT of the wiring substrate 3, and the transistor 21a, the matching circuit 22a, the transistor 21b, and the matching circuit 22b are linearly placed between the input terminal TIN and the output terminal TOUT.