Power Amplifier Bias Circuit for Thermal Gain Stability

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Solution Overview

Problem

Amplifiers experience self-heating that leads to gain decrease and gain variation over time, causing degradation of error vector magnitude (EVM) and dynamic EVM, especially in pulsed modulated systems, and existing technologies lack effective compensation methods for GaAs power amplifiers.

Innovation Solution

A power amplifier circuit with thermally linked transistors and bias transistors, minimizing emitter-to-emitter spacing to enhance thermal sharing and control gain versus time (GvT) performance, requiring no external compensation circuitry.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If amplifiers are operated in pulsed modulated systems, then power output is improved, but gain variation over time increases causing EVM degradation

Engineering Contradiction:
Improvepower outputVSAvoidgain stability
Core Design Contradiction:
PowerVSReliability

Solution Approach 1:

The patent applies parameter changes by dynamically adjusting the bias current of the power amplifier transistor based on its temperature. A temperature sensor detects the transistor's temperature, and a bias control circuit modifies the bias current accordingly to compensate for self-heating effects. This maintains stable gain and EVM performance while allowing the amplifier to operate at high power output levels in pulsed modulated systems.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If transistor spacing is reduced to enhance thermal sharing, then gain versus time performance is improved, but manufacturing precision requirements increase

Engineering Contradiction:
Improvegain versus time performanceVSAvoidtransistor spacing precision
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent introduces a bias control circuit as an intermediary between the temperature sensor and the power amplifier transistor. This circuit processes temperature information and adjusts bias current dynamically, eliminating the need for extremely tight transistor spacing. The intermediary approach achieves stable gain versus time performance through electronic control rather than relying solely on precise physical positioning.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If external compensation circuitry is added to correct gain variation, then EVM performance is improved, but device complexity increases

Engineering Contradiction:
ImproveEVM performanceVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements self-service by incorporating a temperature sensor directly on the amplifier die that monitors the power amplifier transistor's temperature. The sensor and bias control circuit work together to automatically detect and compensate for self-heating effects, maintaining stable EVM performance without requiring external compensation circuitry. This self-contained approach reduces overall device complexity while achieving the desired performance.

Inventive Principle:
Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Reduces GvT non-linear performance degradation by approximately 40% and improves power-added efficiency, maintaining consistent gain over time.

Implementation Method 1

a second transistor having a second collector, a second emitter, and a second base, the second transistor being thermally linked to the first transistor

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentUS20250219599A1Gain performance circuit
Publication Date: 2025.07.03 SKYWORKS SOLUTIONS INC
  • US20250219599A1 patent drawing
  • US20250219599A1 patent drawing
  • US20250219599A1 patent drawing

AI summary

A power amplifier circuit comprising a first transistor having a first collector, a first emitter, and a first base, a second transistor having a second collector, a second emitter, and a second base, the second transistor being thermally linked to the first transistor and a bias transistor having a third collector, a third emitter, and a third base, the bias transistor being coupled between the first transistor and the second transistor.