Differential Amplifier Offset Cancellation Using Boosted Charge Current

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Solution Overview

Problem

Existing digital offset cancellation mechanisms for differential amplifiers in semiconductor devices require increasing the number of latch circuits and constant current sources, leading to increased circuit area and longer test times, which hinders the speed enhancement of data reading.

Innovation Solution

A differential amplifier configuration that includes a current source, active element pairs, load element pairs, capacitance element pairs, switching elements for offset cancellation, and a current control circuit to increase the suppliable current during offset cancellation, thereby shortening the offset cancellation time.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If the number of latch circuits and constant current sources is increased to improve offset voltage compensation accuracy, then the offset suppression performance is improved, but the circuit area increases and the test time increases

Engineering Contradiction:
Improveoffset voltage compensation accuracyVSAvoidcircuit area
Core Design Contradiction:
Measurement precisionVSArea of stationary object

Solution Approach 1:

The patent changes the operating parameter (current magnitude) dynamically by switching between a first constant current source (smaller current) and a second constant current source (larger current). During offset cancellation, the larger current accelerates the charging of capacitance elements to compensate for offset voltage quickly. During normal operation, the smaller current maintains low power consumption while preserving the compensated state.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent introduces dynamic current control where the current magnitude supplied to the differential amplifier is not fixed but changes based on operational phase. A control circuit switches between different current sources depending on whether the system is in offset cancellation mode or normal data reading mode, optimizing performance for each phase.

Inventive Principle:
Principle #15Dynamics

2Measurement precision

If the number of latch circuits and constant current sources is increased to improve offset voltage compensation accuracy, then the offset suppression performance is improved, but the test time increases

Engineering Contradiction:
Improveoffset voltage compensation accuracyVSAvoidtest time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent changes the operating parameter (current magnitude) dynamically by switching between a first constant current source (smaller current) and a second constant current source (larger current). During offset cancellation, the larger current accelerates the charging of capacitance elements to compensate for offset voltage quickly. During normal operation, the smaller current maintains low power consumption while preserving the compensated state.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent introduces dynamic current control where the current magnitude supplied to the differential amplifier is not fixed but changes based on operational phase. A control circuit switches between different current sources depending on whether the system is in offset cancellation mode or normal data reading mode, optimizing performance for each phase.

Inventive Principle:
Principle #15Dynamics

3Productivity

If the current suppliable by the current source is increased to speed up offset cancellation, then the offset cancellation time is reduced, but the power consumption increases

Engineering Contradiction:
Improveoffset cancellation speedVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The patent employs periodic switching between different current magnitudes based on operational phase. During offset cancellation phase, the larger current is applied to speed up the process. During normal data reading phase, the smaller current is applied to reduce power consumption. This periodic alternation optimizes both speed and energy efficiency.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The patent introduces dynamic current control where the current magnitude supplied to the differential amplifier is not fixed but changes based on operational phase. A control circuit switches between different current sources depending on whether the system is in offset cancellation mode or normal data reading mode, optimizing performance for each phase.

Inventive Principle:
Principle #15Dynamics

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enables the speed enhancement of data reading while effectively suppressing the influence of offset voltage, reducing the overall operation time of the sense amplifier.

Implementation Method 1

a capacitance element pair that is inserted between an external input terminal pair and the input terminal pair

Methodology Applied
Scientific EffectCapacitance: Capacitance

Implementation Method 2

a switching element pair that performs an offset cancellation operation to charge the capacitance element pair such as to cause the capacitance element pair to generate a voltage by short-circuiting corresponding terminals between the output terminal pair and the input terminal pair, the voltage being obtained by converting an offset voltage of the input terminal pair into an input voltage

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Data Source

PatentUS12267053B2Differential amplifier, semiconductor device and offset cancellation method
Publication Date: 2025.04.01 RENESAS ELECTRONICS CORP
  • US12267053B2 patent drawing
  • US12267053B2 patent drawing
  • US12267053B2 patent drawing

AI summary

Speed enhancement of data reading is achieved while suppressing an influence of an offset voltage of a differential amplifier. The differential amplifier includes: a current source that is connected to a first power supply in which a suppliable current is a first current; an active element pair that is connected to the current source, and amplifies a signal input to an input terminal pair to output an output signal pair; a load element pair that is connected to a second power supply different in power supply voltage from the first power supply, the load element pair serving for outputting the output signal pair to an output terminal pair; and a capacitance element pair that is inserted between an external input terminal pair and the input terminal pair; a switching element pair that charges the capacitance element pair to generate a voltage, which is obtained by converting an offset voltage of the input terminal pair into an input voltage, in the capacitance element pair by short-circuiting corresponding terminals between the output terminal pair and the input terminal pair; and a current control circuit that controls a current suppliable by the current source to a second current larger than the first current at a time of performing the charge.