Amplifier-Driven Triple-Well RF Switches for Substrate Loss Isolation

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Solution Overview

Problem

Existing RF switches at millimeter-wave frequencies in silicon CMOS processes face significant insertion loss due to lossy silicon FETs and substrates, which are more expensive and power-consuming compared to GaAs devices, and previous solutions have not effectively minimized substrate-related losses.

Innovation Solution

The use of triple-well NFETs with an amplifier and buffer amplifier configuration, along with impedance matching inductors, to reduce channel, source, and drain-to-substrate capacitances and resistances, and employing a bipolar junction transistor in a BiCMOS process to achieve lower insertion loss.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If silicon FETs are used in CMOS process for RF switches at millimeter-wave frequencies, then cost and power consumption are reduced compared to GaAs devices, but insertion loss increases significantly due to lossy silicon substrate and FET characteristics

Engineering Contradiction:
Improveinsertion lossVSAvoidsubstrate loss characteristics
Core Design Contradiction:
Loss of energyVSEase of manufacture

Solution Approach 1:

The patent segments the silicon substrate into isolated regions using deep N-wells that electrically isolate the RF signal path from the lossy P-substrate. This segmentation prevents the RF signal from interacting with the lossy substrate while maintaining the benefits of silicon CMOS fabrication.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The deep N-well acts as an intermediary layer between the RF signal path and the P-substrate. It provides a low-loss transmission path for RF signals while isolating them from the lossy substrate, effectively mediating between the signal requirements and substrate characteristics.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If elaborate biasing circuits are used for FET gates in SPDT switches, then switching performance is improved, but device complexity and circuit elaboration increase

Engineering Contradiction:
Improveswitching performanceVSAvoidcircuit elaboration
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts the complex biasing circuitry from the gate control path and replaces it with direct connection to the N-well. This eliminates elaborate biasing networks while maintaining proper FET operation through the N-well potential control.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The N-well potential is self-adjusted by the RF signal itself, eliminating the need for external biasing circuits. The well potential follows the RF signal automatically, providing the necessary gate control without additional active components or complex biasing networks.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS8228112B2Switch with reduced insertion loss
Publication Date: 2012.07.24 GLOBALFOUNDRIES US INC
  • US8228112B2 patent drawing
  • US8228112B2 patent drawing
  • US8228112B2 patent drawing

AI summary

A circuit includes an amplifier having an input and an output; and at least one transistor comprising at least one terminal and at least one isolated well. The input of the amplifier is electrically connected to the at least one terminal of the transistor; and the output of the amplifier is electrically connected to the at least one isolated well of the at least one transistor.