Amplifier Fast-Charge Bias Circuit for Shorter Enable Time
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Solution Overview
Problem
Conventional amplifiers face challenges in meeting both linearity specifications for IIP3 at low tone spacing frequencies and fast enable time requirements due to the need for large capacitance in tank circuits, which increases the RC time constant and delays the achievement of steady-state bias voltage.
Innovation Solution
A fast charge circuit is introduced, incorporating switches, resistors, and a comparator to provide a low impedance path for biasing, reducing the RC time constant and enabling faster charge times, while maintaining high impedance for RF isolation after reaching the steady-state bias voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a large capacitance is used in the tank circuit to provide low impedance at low tone spacing frequency, then the linearity specification for IIP3 is met, but the enable time of the amplifier increases
Solution Approach 1:
The patent applies dynamics by making the impedance of the tank circuit time-variable. During the enable phase, the circuit dynamically switches to a low-impedance configuration to quickly charge the large capacitance and reduce enable time. Once enabled, it transitions to a high-impedance configuration to maintain the low-pass filter functionality for meeting IIP3 specifications. This dynamic switching resolves the contradiction between fast enable time and linearity performance.
Solution Approach 2:
The patent segments the tank circuit into two functional parts: a first tank circuit with large capacitance for low-pass filtering to meet IIP3 requirements, and a second tank circuit with small capacitance for fast charging during enable. This segmentation allows each circuit to optimize its specific function without compromising the other, thereby resolving the contradiction between linearity and enable time.
2Reliability
If a large capacitance is used in the tank circuit, then the low impedance necessary to meet IIP3 requirements is provided, but the RC time constant at the bias input increases
Solution Approach 1:
The patent segments the capacitance into two separate circuits: a first tank circuit with large capacitance (first capacitance value) dedicated to low-pass filtering for IIP3 performance, and a second tank circuit with small capacitance (second capacitance value) dedicated to fast charging. This segmentation eliminates the direct relationship between large capacitance and long RC time constant, as the large capacitance is no longer in series with the bias input resistance during enable.
Solution Approach 2:
The patent introduces a switch as an intermediary element that controls the connection between the bias input and the large capacitance of the first tank circuit. During enable, the switch isolates the large capacitance from the bias input, preventing it from contributing to the RC time constant. This intermediary allows the system to have both large capacitance for filtering and fast enable time without the RC time constant penalty.
3Reliability
If a conventional amplifier design is used, then the tank circuit provides low impedance at particular tone spacing frequency, but it is difficult to meet both IIP3 specifications at low tone spacing frequencies and fast enable time specification
Solution Approach 1:
The patent makes the tank circuit impedance dynamic rather than static. The impedance is adjusted based on the operational state: low impedance during enable to facilitate fast charging, and high impedance during normal operation to provide low-pass filtering for IIP3 performance. This dynamic adaptation allows the amplifier to meet both fast enable time and IIP3 specifications at low tone spacing frequencies.
Solution Approach 2:
The patent creates a multi-functional system where the first tank circuit is dedicated to low-pass filtering for linearity, while the second tank circuit handles fast charging during enable. This universal design allows the amplifier to perform both functions (meeting IIP3 and achieving fast enable) within a single integrated circuit architecture, rather than requiring separate designs for each function.
Data Source
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AI summary
According to an exemplary embodiment, an amplification module (200) includes a bias circuit (204) coupled to an input of an amplifier (202), where the bias circuit (204) is configured to charge the input of the amplifier (202) to a final bias voltage. The amplification module (200) further includes a fast charge circuit (210) configured to provide a low impedance path (246) between the bias circuit (204) and the input of the amplifier (202) when a voltage at the input of the amplifier (202) is less than the final bias voltage, thereby reducing an enable time of the amplifier (202). The fast charge circuit (210) is further configured to open the low impedance path (246) when the voltage at the input of the amplifier (202) is substantially equal to the final bias voltage. The fast charge circuit (210) includes a comparator (224) configured to cause the low impedance path (246) to open when the voltage at the input of the amplifier (202) is substantially equal to a reference voltage.