Multi-Stage Amplifier Gain Control Circuit for LDO Stability

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Solution Overview

Problem

Multi-stage amplifiers, such as low-dropout (LDO) regulators, face challenges in achieving a stable output voltage while maintaining high bandwidth in response to load transients, often resulting in stability issues due to the accumulation of gain across amplification stages.

Innovation Solution

The implementation of a gain control circuit that reduces the effective output impedance of the amplifier transistor through current feedback, using a current mode circuit to control gain and stabilize the multi-stage amplifier, thereby improving stability and maintaining high bandwidth.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If multiple amplification stages are used to increase gain, then the output voltage stability is improved, but the bandwidth is reduced and stability issues arise due to gain accumulation

Engineering Contradiction:
Improveoutput voltage stabilityVSAvoidbandwidth
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The patent implements a feedback mechanism where a portion of the output signal from the intermediate amplification stage is fed back to its input through a feedback network. This feedback reduces the effective gain of the intermediate stage, preventing excessive gain accumulation that would otherwise reduce bandwidth and cause stability issues. The feedback loop allows the multi-stage amplifier to maintain output voltage stability while preserving bandwidth by dynamically adjusting the intermediate stage gain.

Inventive Principle:
Principle #23Feedback

2Reliability

If the gain of the intermediate amplification stage is increased to improve output stability, then the phase margin is reduced leading to instability

Engineering Contradiction:
Improveoutput voltage stabilityVSAvoidphase margin
Core Design Contradiction:
ReliabilityVSStability of the object's composition

Solution Approach 1:

The feedback network takes a portion of the output signal from the intermediate amplification stage and feeds it back to the input, creating a negative feedback loop. This reduces the effective gain of the intermediate stage, which in turn increases the phase margin and improves overall system stability. The feedback mechanism allows the amplifier to maintain stability while still achieving the required output voltage regulation.

Inventive Principle:
Principle #23Feedback

3Speed

If the bandwidth is increased to respond rapidly to load transients, then the output voltage stability is compromised

Engineering Contradiction:
Improveresponse speed to load transientsVSAvoidoutput voltage stability
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent employs dynamic gain control where the intermediate amplification stage's gain is adjusted based on operating conditions. Through the feedback mechanism, the effective gain varies with signal level and frequency, allowing the amplifier to maintain high bandwidth for rapid transient response while ensuring stability during steady-state operation. This dynamic adjustment resolves the contradiction between speed and stability.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentEP2824531B1Method and circuit for controlled gain reduction of a gain stage
Publication Date: 2019.09.18 DIALOG SEMICON GMBH
  • EP2824531B1 patent drawingFigure 1a~1b
  • EP2824531B1 patent drawingFigure 2
  • EP2824531B1 patent drawingFigure 3

AI summary

The present document relates to multi-stage amplifiers, such as linear regulators or linear voltage regulators (e.g. low-dropout regulators) configured to provide a constant output voltage subject to load transients. A multi-stage amplifier (100, 200) is described. The multi-stage amplifier comprises a first amplification stage (101) configured to provide a stage output voltage at a stage output node (255). Furthermore, the amplifier comprises an intermediate amplification stage (102) comprising an amplifier current source (261) configured to provide an amplifier current and an amplifier transistor (260) arranged in series with the amplifier current source. A gate of the amplifier transistor (260) is coupled to the stage output node (255) of the first amplification stage (101). The intermediate amplification stage (102) is configured to provide an amplified or attenuated stage output voltage at a midpoint (262) between the amplifier current source (261) and the amplifier transistor (260). Furthermore, the amplifier comprises a gain control circuit (300) configured to reduce an effective output impedance of the amplifier transistor (260) by providing a current feedback to the midpoint (262).