High-Frequency Amplifier Linearization With Error Current Compensation
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Solution Overview
Problem
In high frequency amplifiers, the parasitic base-collector capacitance in bipolar common base amplifiers creates an error current that reduces the output load, making it less than the input current, necessitating a correction mechanism.
Innovation Solution
The implementation of a circuit comprising current mirrors and transistors, including PNP and NPN transistors, with specific terminal and electrode configurations, along with resistors and voltage rails, to compensate for the error current by mirroring and subtracting it from the output current, thereby correcting the output load to match the input current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a bipolar common base amplifier is used at high frequency, then signal amplification is achieved, but base-collector capacitance creates error current that reduces output load
Solution Approach 1:
The patent implements a feedback mechanism where the error current generated by base-collector capacitance is detected and fed back through current mirrors to generate a compensating current. This compensating current is subtracted from the output, effectively canceling the error current and restoring the output load to match the input current, thus resolving the energy loss problem while maintaining high frequency operation
Solution Approach 2:
The patent converts the harmful effect of base-collector capacitance into a useful signal by using the error current itself as the input to the compensation circuit. The same capacitance that causes the problem generates the error current that drives the feedback mechanism, which then produces the compensating current needed to correct the distortion, transforming the harmful parasitic effect into a beneficial self-correcting feature
2Speed
If base-collector capacitance is present in the amplifier, then high frequency signal transmission is enabled, but error current δI1 reduces the output load current
Solution Approach 1:
The patent uses feedback through current mirrors to detect the error current δI1 caused by base-collector capacitance and generates an equal and opposite compensating current. This feedback loop continuously corrects the output current to match the input current, maintaining high precision current transmission despite the presence of parasitic capacitance at high frequencies
Solution Approach 2:
The patent employs current mirrors to create precise copies of the error current. The first current mirror copies the error current δI1, and the second current mirror creates additional copies that are combined to form the compensating current. This copying mechanism allows for accurate reproduction and cancellation of the error current, maintaining output current precision
3Manufacturing precision
If current mirrors are added to compensate for error current, then output current accuracy is improved, but device complexity increases
Solution Approach 1:
The patent achieves multi-functionality by using the same current mirror structures for both signal amplification and error current compensation. The current mirrors serve dual purposes: they amplify the input signal while simultaneously detecting and compensating for errors caused by base-collector capacitance, reducing the need for separate compensation circuits and minimizing overall device complexity
Solution Approach 2:
The patent merges the error compensation function with the existing amplifier structure by integrating current mirrors into the signal path. The compensation circuitry is combined with the amplification stages, allowing both functions to operate simultaneously within a unified circuit architecture, thereby reducing the total number of discrete components and simplifying the overall device
Data Source
AI summary
An output stage for an amplifier is provided. The amplifier generally provides for compensation of an error current generated by the base-collector (or gate-drain) capacitance of a common base (or gate) amplifier transistor. The stage accomplishes this by utilizing a three transistor Wilson current mirror to combine the error current with a mirrored bias current to reduce the load current on the common base (or gate) amplifier transistor.