Amplifier Offset Cancellation Using Feedforward Current Mirrors

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Solution Overview

Problem

Amplifier circuits used in sensor systems face challenges in achieving high gain, low offset, low power consumption, and high-speed operation while maintaining stability, particularly due to manufacturing variations that lead to input offset issues.

Innovation Solution

The amplifier circuit employs a dual-mode operation using a buffer mode for offset cancellation, where a charge is injected based on the potential difference between input ends, and a comparator mode to transmit only signal differential values, utilizing differential circuits and current mirrors to control idle current and offset, thereby enhancing gain and stability without feedback loops.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If feedback loops are used to control offset and gain, then manufacturing precision is improved, but device complexity increases and stability deteriorates

Engineering Contradiction:
Improveoffset controlVSAvoidfeedback loop structure
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent extracts and eliminates the feedback loop from the amplifier circuit, replacing it with a feedforward architecture using dummy transistors and current mirrors. This removes the complex feedback mechanism while maintaining offset control through predetermined current relationships established during manufacturing.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent implements preliminary action by using dummy transistors and current mirrors to pre-establish the desired current relationships and offset cancellation before the amplifier operates. The dummy devices are configured to create predetermined current values that automatically compensate for manufacturing variations without requiring real-time feedback adjustment.

Inventive Principle:
Principle #10Preliminary action

2Power

If high gain is achieved through amplifier design, then signal amplification is improved, but bandwidth decreases and speed performance deteriorates

Engineering Contradiction:
ImprovegainVSAvoidbandwidth
Core Design Contradiction:
PowerVSSpeed

Solution Approach 1:

The patent applies dynamics by implementing a two-stage amplifier architecture where the first stage provides high gain with compensation techniques, and the second stage provides additional gain while maintaining bandwidth. The dynamic compensation circuit adjusts the frequency response to maintain stability across the gain bandwidth, allowing high gain without proportionally reducing bandwidth.

Inventive Principle:
Principle #15Dynamics

3Use of energy by moving object

If current consumption is reduced for low power operation, then energy efficiency is improved, but signal-to-noise ratio deteriorates and offset control becomes difficult

Engineering Contradiction:
Improvecurrent consumptionVSAvoidoffset control
Core Design Contradiction:
Use of energy by moving objectVSMeasurement precision

Solution Approach 1:

The patent uses parameter changes by implementing adaptive biasing circuits that dynamically adjust the operating point and current levels based on the input signal conditions. During offset calibration, higher currents are used to achieve precise offset cancellation, while during normal operation, currents are reduced to minimize power consumption. This allows offset control at low power by changing the current parameters selectively.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20240313720A1Amplifier circuit and system
Publication Date: 2024.09.19 KK TOSHIBA
  • US20240313720A1 patent drawing
  • US20240313720A1 patent drawing
  • US20240313720A1 patent drawing

AI summary

A first circuit outputs first and second currents having different magnitudes. A second circuit receives the first current and first and second voltages, and outputs third and fourth currents based on the first and second voltages. A third circuit receives the second current and the first and second voltages, and outputs fifth and sixth currents based on the first and second voltages. A fourth circuit outputs an eighth current having a magnitude of the magnitude of the third current without a magnitude of a seventh current, which is a sum of the fifth and sixth currents, and a ninth current having a magnitude of the magnitude of the fourth current without the magnitude of the seventh current. A fifth circuit receives the eighth and ninth currents, outputs tenth and eleventh currents based on the eighth and ninth currents to a first end.