Multi-Stage Amplifier Circuit with Quarter-Wave Transmission Lines
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional power amplifiers, especially those operating in Doherty and Chireix modes, face inefficiencies when handling signals with high peak-to-average power ratio (PAR) due to uneven distribution of transition points at low output amplitudes, requiring amplitude-limited drive signals and increased implementation complexity.
Innovation Solution
The amplifier arrangement comprises a cascade of quarter wavelength transmission lines with N-1 stages, where the Nth stage is coupled to the output node, and remaining stages are connected to successive junctions via quarter wavelength lines, ensuring high density of transition points at low output amplitudes, thereby improving efficiency for high PAR signals even with equal-sized transistors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If conventional single-transistor power amplifiers are used with fixed RF load resistance and voltage supply, then the amplifier structure is simple, but the average efficiency is low when amplifying signals with high peak-to-average power ratio
Solution Approach 1:
The amplifier is divided into multiple transistor stages (at least two transistors) with separate biasing and loading networks. Each transistor operates in different regions to handle different signal amplitudes, with the first transistor handling larger signals and the second transistor supplementing during peak periods. This segmentation allows the system to maintain high efficiency across varying signal levels by optimizing each stage's operating point independently.
2Use of energy by moving object
If power amplifiers are configured to operate in Doherty or Chireix modes with multiple transistors, then the average efficiency is improved for high PAR signals, but the distribution of transition points is uneven at low output amplitudes requiring amplitude-limited drive signals
Solution Approach 1:
Different biasing conditions are applied to different transistor stages to create locally optimized performance. The first transistor is biased to conduct over a wider angle (e.g., class AB or B) while the second transistor is biased to conduct only during peak excursions (e.g., class C or as a peaking device). This local differentiation of operating characteristics creates a more uniform distribution of transition points across the output amplitude range, eliminating the need for amplitude-limited drive signals.
3Ease of operation
If the first transistor is loaded with a higher load resistance than the second transistor, then the transition points are more evenly distributed, but the impedance matching network becomes more complex
Solution Approach 1:
The invention deliberately changes the load resistance parameter for each transistor stage to achieve better transition point distribution. The first transistor is assigned a higher load resistance (R_L1) while the second transistor receives a lower load resistance (R_L2). This parameter differentiation is achieved through carefully designed impedance matching networks that transform the common load to appropriate values for each transistor, optimizing the overall efficiency and linearity performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration provides enhanced efficiency for high PAR signals by distributing transition points more evenly, reducing the need for amplitude-limited drive signals and simplifying implementation, leading to improved average efficiency compared to prior art solutions.
Implementation Method 1
the main transistor ('carrier amplifier') displaced from the output node by a quarter wavelength transmission line of characteristic impedance Ropt... this line acts as a quarterwave transformer. The transimpedance to the output from the main transistor is equal to the characteristic impedance of the quarterwave line (i.e. Ropt), instead of Rload as would be the case for one transistor coupled directly to the load. The self-impedance at the main transistor is increased quadratically to the characteristic impedance squared divided by Rload (aka 'impedance inversion' of the load).
Implementation Method 2
Higher transimpedance means higher voltage at the output for the same amount of current. This is achieved in the Doherty amplifier by having the main transistor ('carrier amplifier') displaced from the output node by a quarter wavelength transmission line of characteristic impedance Ropt... If the peak transistor (also known as 'auxiliary amplifier' or 'peaking amplifier') has an Ropt that in parallel combination with the Ropt of the main transistor gives Rload, full combined output power will be possible by in-phase combining (i.e. adjusting the phase (time, electrical length) difference between the main and peak drive signals so the output waves from both are in phase at the output Rload).
Data Source
Figure 1a~1c
Figure 2a~2c
Figure 3a~3c
AI summary
An amplifier arrangement comprises N amplifier stages (101 to 10N), wherein N is an integer equal or greater than four. The amplifier arrangement comprises a cascade of quarter wavelength transmission lines coupled between an output of an amplifier of a first amplifier stage (101) and an output node (15) of the amplifier arrangement, wherein the cascade comprises N-1 quarter wavelength transmission lines (111 to 11N-1). An amplifier of the Nth stage (10N) is coupled to the output node (15), and remaining amplifiers between the first and Nth stages (102 to 10N-1) coupled to successive junctions in the cascade of quarter wavelength transmission lines (111 to 11N-1). The amplifier arrangement is further configured such that the amplifier of the Nth stage (10N) is coupled to the output node (15) via a connecting quarter wavelength transmission line (131), and whereby each of the remaining amplifiers (103 to 10N-1) of the N-2 stages closest to the output node (15) is coupled by a respective connecting quarter wavelength transmission line (132 to 13N-2) to a respective junction of the cascade of quarter wavelength transmission lines.