Amplifier Layout Using Thick TOP Conductors to Suppress Offset Hysteresis
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Solution Overview
Problem
Conventional amplifiers experience offset hysteresis due to increased thickness of TOP conductors, which causes mismatching and displacement of the Si interface, leading to incomplete recovery from temperature changes and resulting in output voltage variations.
Innovation Solution
The layout of TOP conductors is optimized by arranging them thicker than lower layer conductors but farther away from the transistors, reducing the influence of heat stress and minimizing displacement differences between transistors, thereby suppressing offset hysteresis.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If the thickness of TOP conductors is increased, then current carrying capacity is improved, but offset hysteresis increases due to Si interface displacement
Solution Approach 1:
The patent addresses the contradiction by transitioning from a two-dimensional planar layout to a three-dimensional stacked configuration. Thicker TOP conductors are arranged in upper layers positioned farther from the Si interface, while lower layer conductors remain closer to provide structural support. This vertical separation allows the TOP conductors to carry higher currents without causing excessive Si interface displacement, as the distance from the interface reduces the thermal and mechanical stress impact.
Solution Approach 2:
The conductor system is segmented into multiple layers with distinct functions. Lower layer conductors provide structural support and are positioned closer to the Si interface, while upper layer TOP conductors handle current transmission and are positioned farther away. This segmentation allows each layer to be optimized independently - the lower layers minimize interface displacement while the upper layers maximize current carrying capacity.
2Device complexity
If TOP conductors are placed closer to transistors, then wiring complexity is reduced, but heat stress influence increases causing transistor mismatching
Solution Approach 1:
The patent resolves this contradiction by utilizing the vertical dimension to separate conductors from transistors. TOP conductors are positioned in upper layers at a greater vertical distance from the transistor active regions, reducing heat stress influence while maintaining routing flexibility. This three-dimensional arrangement allows complex wiring to be achieved without compromising transistor matching, as the thermal coupling is minimized through increased spacing.
Solution Approach 2:
Lower layer conductors act as intermediaries between the Si interface and the TOP conductors. These intermediate conductors are positioned closer to the transistors and can be designed with appropriate thermal management characteristics, while the TOP conductors in upper layers are thermally isolated from the transistors, reducing their heat stress influence on transistor matching.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively reduces the displacement of the Si interface and minimizes offset hysteresis, ensuring stable amplifier performance across temperature changes.
Implementation Method 1
the layout of TOP conductors is optimized by arranging them thicker than lower layer conductors but farther away from the transistors, reducing the influence of heat stress
Data Source
AI summary
An amplifier includes a first transistor, a second transistor arranged adjacent to the first transistor in plan view, a first conductor arranged around the first transistor and the second transistor in plan view, and a second conductor arranged, in plan view, in a direction farther away from the first transistor and the second transistor than the first conductor. The second conductor has a thickness that is greater than a thickness of the first conductor.