Gain-Mode Amplifying Circuit With Parasitic Capacitance Compensation
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Solution Overview
Problem
Conventional cascode Low Noise Amplifiers (LNAs) suffer from parasitic capacitance effects, leading to noise figure increases and instability, with existing methods using inductors causing leakage current issues, necessitating a new mechanism to reduce parasitic capacitance.
Innovation Solution
An amplifying circuit design incorporating a first and second transistor in series, along with a compensation capacitor group comprising multiple capacitors and switches, where the capacitors are selectively coupled in parallel to create negative capacitance, canceling out parasitic capacitance effects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional cascode LNA structure is used, then gain requirement is met, but parasitic capacitance effect increases noise figure and reduces stability
Solution Approach 1:
The patent introduces compensation capacitors that generate negative capacitance to cancel out the harmful parasitic capacitance. The harmful parasitic capacitance between transistors is converted into a beneficial effect by using equal but opposite negative capacitance from compensation capacitors, thereby improving stability and noise performance
Solution Approach 2:
The compensation capacitors are pre-configured to provide negative capacitance that counteracts the parasitic capacitance before it can degrade performance. By preliminarily establishing this compensating mechanism, the circuit maintains stability and low noise figure across operating conditions
2Object-affected harmful factors
If inductors are used to cancel parasitic capacitance, then parasitic capacitance effect is reduced, but leakage current problems occur
Solution Approach 1:
The patent replaces the mechanical/physical inductor-based capacitance cancellation approach with an electronic solution using compensation capacitors and switches. This substitution eliminates the leakage current inherent in inductor implementations while achieving the same parasitic capacitance cancellation effect through electronic capacitance control
3Reliability
If compensation capacitors are selectively coupled to reduce parasitic capacitance, then stability and noise performance improve, but device complexity increases
Solution Approach 1:
The compensation capacitor network is segmented into multiple independently controllable units, each associated with specific transistors. This segmentation allows selective activation of compensation capacitors based on operating conditions, managing complexity through modular control while maintaining effectiveness
Solution Approach 2:
The circuit employs dynamic control of compensation capacitors through switches that can selectively connect or disconnect capacitors based on operating mode. This dynamic configuration allows the circuit to adapt to different conditions, optimizing performance while managing complexity through conditional activation rather than permanent connections
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed solution effectively reduces parasitic capacitance, improving the stability and noise performance of the amplifying circuit by utilizing negative capacitance to counteract parasitic capacitance, thereby enhancing the circuit's gain and reducing leakage currents.
Implementation Method 1
the negative capacitance can be used to cancel out the parasitic capacitance in the amplifying circuit
Data Source
AI summary
An amplifying circuit comprises: a plurality of first transistors; a second transistor coupled in series with the first transistor; and a compensation capacitor group comprising a plurality of compensation capacitors and a plurality of switches. When the amplifying circuit operates in a first gain mode, a first number of first transistors are turned on and a second number of compensation capacitors are coupled between the first terminal and the second terminal of the first transistor. When the amplifying circuit operates in a second gain mode, a third number of first transistors are turned on and a fourth number of compensation capacitors are coupled between the first terminal and the second terminal of the first transistor. The first number is larger than the third number, and the second number is larger than the fourth number.