Analog Buffer for LCD Power Reduction via Bootstrapping
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing analog buffers for liquid crystal display devices face challenges in reducing power consumption, particularly due to the large size and high power consumption of inverters required to drive data lines with significant capacitance, which affects the efficiency of the liquid crystal display apparatus.
Innovation Solution
The proposed analog buffer incorporates a comparator with series-connected inverters, a feedback switch, and an output inverter configured with PMOS and NMOS transistors to pre-charge and discharge driving voltages during reset and feedback intervals, minimizing power consumption by ensuring current flow only during charging and discharging, and preventing oscillations by avoiding simultaneous PMOS and NMOS transistor activation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If large-sized inverters are used to drive data lines with significant capacitance, then the driving capability is improved, but the power consumption increases
Solution Approach 1:
The patent applies preliminary action by pre-charging the output line to the input voltage level before the actual signal transition. This is achieved through a bootstrapping mechanism where the output of the inverter chain is pre-charged to match the input voltage, thereby reducing the voltage swing and the amount of charge that needs to be transferred during the actual switching operation. This preliminary preparation reduces the power consumption of the output inverter while maintaining its driving capability.
Solution Approach 2:
The patent changes the voltage parameter dynamically by using a bootstrapped voltage supply for the output inverter. Instead of using a fixed supply voltage, the output inverter's supply voltage is boosted to follow the input voltage level, effectively changing the operating parameters of the inverter to match the signal conditions. This parameter adaptation allows the inverter to operate with reduced voltage swing and lower power consumption while maintaining adequate driving capability.
2Use of energy by moving object
If the inverter size is reduced to lower power consumption, then the power efficiency is improved, but the ability to drive capacitive data lines deteriorates
Solution Approach 1:
The patent introduces an intermediary bootstrapping circuit between the input and output of the inverter chain. This intermediary mechanism includes additional inverters and capacitors that create a voltage-boosting network, mediating the power delivery to the output inverter. The bootstrapping circuit acts as an intermediary power source that enables smaller output inverters to achieve adequate driving capability by providing them with enhanced instantaneous power during switching events.
Solution Approach 2:
The patent employs periodic action through the oscillating bootstrapping circuit that periodically charges and discharges the bootstrapping capacitor. This periodic charging action occurs at the clock frequency, synchronizing with the data transitions. The periodic replenishment of charge to the bootstrapping capacitor ensures that the output inverter receives the necessary power bursts exactly when needed, enabling efficient operation with smaller device sizes.
3Reliability
If multiple inverters are used to buffer the signal, then the signal integrity is improved, but the device complexity and power consumption increase
Solution Approach 1:
The patent merges the functions of signal buffering and voltage boosting into a unified inverter chain with bootstrapping. Instead of separate buffering stages and separate voltage regulation circuits, the design combines these functions into the inverter chain itself, where the same inverters that buffer the signal also participate in the bootstrapping voltage generation. This functional merging reduces the total number of components while maintaining both signal integrity and power efficiency.
Solution Approach 2:
The patent applies universality by designing the inverter chain to serve multiple functions simultaneously. The inverters in the chain not only buffer and regenerate the digital signal (primary function) but also generate the bootstrapped voltage needed for power efficiency (secondary function). This multi-functionality is achieved by configuring the inverters with capacitive feedback networks that allow them to participate in both signal processing and voltage regulation, thereby reducing overall circuit complexity.
Data Source
AI summary
The present invention provides an analog buffer and a liquid crystal display apparatus using the same and a driving method thereof capable of reducing power consumption. An analog buffer according to the present invention includes: a comparator including an inverter connected in series to the input line; a feedback switch connected between the input line and the output line; and an output inverter, connected between the comparator and the output line, for pre-charging any one of driving voltages of a first driving voltage and a second driving voltage into the output line for a reset interval, and for cutting-off the first and second driving voltages when the pre-charged voltage is fed back via the feedback switch to the input line so that it is converged to the input voltage for a feedback interval.