Analog Buffering with Passive Variable Resistance Memory
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Solution Overview
Problem
Existing imaging systems face challenges in decoupling the rate at which analog information is captured from the rate at which it is converted to digital data, leading to limitations in frame rate and image quality, especially in high dynamic range (HDR) image combination due to spatial and temporal disparities.
Innovation Solution
The use of passive variable resistance memory (PVRM) elements to buffer analog information independently of digital conversion, allowing for concurrent storage and selective conversion of images at varying rates, enabling decoupling of capture and conversion rates and providing redundancy buffering.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If analog information is converted to digital data at the same rate it is captured, then the ADC converter determines the output rate, but this creates a bottleneck that limits frame rate and image quality
Solution Approach 1:
The patent divides the capture array into multiple independent capture elements, each with its own PVRM element for analog buffering. This segmentation allows parallel operation of multiple capture elements without requiring the ADC to process all data at the same high rate, thereby increasing overall productivity while managing ADC complexity.
Solution Approach 2:
The patent introduces PVRM elements as intermediary storage between the capture elements and the ADC converter. These analog buffers decouple the capture rate from the conversion rate, allowing the ADC to operate at a manageable speed while the capture array can capture images at higher frame rates, thus removing the ADC bottleneck.
2Adaptability or versatility
If multiple images are captured at different points in time for HDR combination, then HDR images can be created, but temporal and motion disparities cause loss of detail
Solution Approach 1:
The patent uses PVRM elements to preliminarily buffer analog information from capture elements before ADC conversion. This allows multiple images to be captured and stored in analog form with minimal temporal separation, then selectively converted to digital for HDR combination, reducing temporal disparities and preserving detail while maintaining HDR capability.
3Productivity
If the capture rate is increased to improve frame rate, then more images can be captured, but the ADC conversion rate must also increase which increases complexity and cost
Solution Approach 1:
The patent introduces PVRM elements as intermediary analog buffers between the high-speed capture array and the ADC converter. These buffers allow the capture array to operate at high frame rates while the ADC converter operates at a lower, more manageable rate, decoupling the two rates and avoiding the need for expensive high-speed ADCs.
Solution Approach 2:
The patent changes the operational parameters by introducing analog buffering, which allows the capture rate and conversion rate to operate at different speeds. The PVRM elements maintain analog signals at high capture rates while the ADC converts at a lower rate, effectively changing the system's rate parameters without requiring proportionally faster conversion hardware.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for improved frame rates, reduced temporal and spatial disparities in HDR images, and increased system reliability by decoupling capture and conversion rates, enabling higher bandwidth and more granular image capture without requiring faster ADC conversion.
Implementation Method 1
storing the first analog information in a first passive variable resistance memory (PVRM) element coupled to the capture element; and storing the second analog information in a second PVRM element coupled to the capture element
Data Source
AI summary
Generally, an integrated circuit, an apparatus and a method for buffering analog information capture first analog information with a capture element and store at least portions of the analog information in a first passive variable resistance memory element coupled to the capture element and in a second passive variable resistance memory element. The portions of the analog information stored in the first passive variable resistance memory element and in the second passive variable resistance memory element may be the same or may be different.