Analog CDS Circuit for Solid-State Image Sensor Noise Reduction
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Solution Overview
Problem
Conventional solid-state image sensors face issues with high-speed signal reading accuracy due to switching noise and false signal outputs when receiving large amounts of light, leading to decreased image quality and increased size, particularly in compact devices like video cameras and scanners.
Innovation Solution
A novel solid-state imaging device incorporating a pixel circuit with photoelectric conversion elements, an analog correlated double sampling (CDS) circuit, an analog-digital conversion circuit, a signal processing circuit, and a reference voltage generating circuit, which performs correlated double sampling in the analog region and converts signals to reduce noise and prevent false outputs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If digital area difference calculation is used to remove solid-state noise, then noise reduction effectiveness is insufficient, but device complexity remains low
Solution Approach 1:
The patent introduces an analog CDS circuit as an intermediary component between the pixel array and ADC to perform correlated double sampling in the analog domain. This mediator effectively removes solid-state noise before digital processing, achieving superior noise reduction compared to purely digital methods while maintaining system integration
Solution Approach 2:
The patent replaces the conventional digital-only noise reduction approach with an analog-based correlated double sampling mechanism. By performing subtraction operations in the analog domain before ADC conversion, the system achieves more effective noise removal without relying solely on digital signal processing
2Productivity
If switching speed is increased for high-speed reading, then productivity improves, but switching noise increases causing false signals
Solution Approach 1:
The patent converts the harmful switching noise into a manageable signal characteristic by performing correlated double sampling. The analog CDS circuit captures both the signal and switching noise at different time points, then subtracts them to eliminate the noise while preserving the actual image signal, thus transforming a harmful effect into a solvable problem
Solution Approach 2:
The patent performs preliminary noise removal by capturing reference levels before the actual signal reading. The analog CDS circuit stores reset levels in capacitors prior to signal acquisition, then uses these stored reference levels to subtract switching noise from the subsequent signal readings, preventing false signals before they affect image quality
3Measurement precision
If CDS circuit is used in analog area, then noise reduction improves, but device size increases
Solution Approach 1:
The patent merges the CDS circuit functionality directly into the pixel column structure, integrating the analog correlated double sampling operation with the existing pixel readout path. By combining multiple functions (photoelectric conversion, signal amplification, and noise removal) into a unified column-parallel architecture, the system achieves effective noise reduction without proportionally increasing overall sensor size
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enhances image signal accuracy by minimizing switching noise and false signals, improving the efficiency of noise reduction and maintaining image quality even under high-light conditions, while also reducing the size of the image sensor.
Implementation Method 1
a pixel circuit including a plurality of photoelectric conversion elements
Data Source
AI summary
A solid-state imaging device includes a pixel circuit including a plurality of photoelectric conversion elements and configured to output a signal level and a reset level, an analog correlated double sampling (CDS) circuit connected to the pixel circuit and configured to perform correlated double sampling in an analog region based on the signal level and the reset level and output a result of the correlated double sampling, an analog-digital (AD) conversion circuit connected to the analog CDS circuit and configured to convert two different analog signals output from the analog CDS circuit into two digital signals, a signal processing circuit connected to the AD conversion circuit and configured to obtain a difference between the two different digital signals output from the AD conversion circuit; and a reference voltage generating circuit to output a first reference voltage that defines a clamp level of the analog CDS circuit.