Analog Circuit Design Tree Structure Generation
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Solution Overview
Problem
Automatic circuit design, particularly for analog circuits, faces challenges in efficiently generating a reasonable tree structure due to the complexity of circuit topology and parameter selection, with existing methods consuming significant calculation time and resulting in larger tree structures.
Innovation Solution
A method for automatic design of analog circuits based on tree structure, where the maximum height and growth direction of the tree are set, nodes are randomly called from function and port node libraries, and the tree structure is checked for compliance with preset conditions to generate a more reasonable circuit topology and device parameters, using genetic algorithms for evolution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If circuit connection operation is used to design the tree structure, then the tree structure can represent circuit connections, but the structure of the tree becomes larger and more complex
Solution Approach 1:
The patent extracts and separates the circuit connection representation from the tree structure itself. Instead of using circuit connection operations to build the tree, the patent uses a simplified tree structure where nodes represent circuit elements and edges represent connections. The connection information is extracted and stored separately, allowing the tree to remain compact while still fully representing circuit topology.
Solution Approach 2:
The patent segments the circuit representation into distinct components: the tree structure holds hierarchical relationships and element properties, while connection information is segmented and stored as separate attributes or in an auxiliary data structure. This segmentation allows each component to be optimized independently, keeping the tree structure small and efficient.
2Loss of information
If string-based representation is used for circuits, then the circuit can be represented textually, but it consumes a lot of calculation time
Solution Approach 1:
The patent replaces the mechanical string-based textual representation with a data structure-based tree representation. Instead of manipulating strings to represent circuits, the patent uses node and edge objects with defined properties and relationships. This substitution enables more efficient computational operations, as tree traversals and modifications are fundamentally faster than string parsing and manipulation.
Solution Approach 2:
The patent changes the fundamental parameter of representation from textual strings to structured data objects. By transitioning from a character-based system to an object-based tree structure, the patent enables direct access to circuit elements and their properties, eliminating the need for string parsing and significantly reducing calculation time for circuit analysis and design operations.
3Adaptability or versatility
If graph-based representation is used for circuits, then the circuit topology can be represented, but it is not conducive to cross-operation
Solution Approach 1:
The patent segments the graph-based representation into a hierarchical tree structure where nodes represent circuit elements and edges represent connections. This segmentation allows for easier cross-operation by enabling independent manipulation of subtree components. Operations can be performed on specific branches or subcircuits without affecting the entire circuit, making the representation more conducive to modular design and analysis operations.
Solution Approach 2:
The patent transforms the two-dimensional graph representation into a hierarchical tree structure that adds a dimensional aspect of hierarchy and nesting. This dimensional change from a flat graph to a hierarchical tree enables more intuitive cross-operation, as operations can naturally traverse different levels of the hierarchy, making it easier to perform operations across different parts of the circuit while maintaining clear structural relationships.
Data Source
AI summary
A method, apparatus, computer device, and storage medium for automatic design of analog circuits based on tree structure. The method includes: setting the maximum height and growth direction of the tree structure; randomly calling the node from the function node library as the parent node; randomly calling the node from the function node library and the port node library as the child according to the growth direction node; if the child node is a terminal node, generating a tree structure; checking the tree structure, if the tree structure satisfies the preset conditions, obtaining the circuit topology and device parameter that conform to the circuit rules; evolving the circuit topology and device parameter to generate an analog circuit. The embodiments achieve the effect of making the tree structure of the designed analog circuit more reasonable.


