Analog Circuit Yield Optimization via Extreme Value Analysis
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Solution Overview
Problem
Analog circuit design is a time-consuming and resource-intensive process that requires highly skilled engineers, with conventional methods being inefficient and unchanged for decades, leading to long design cycles and high resource utilization.
Innovation Solution
A method involving simulation-based optimization using random value generation, extreme value analysis, and dynamic weighting and ranking to automate the design process, improving yield and efficiency by generating optimized analog circuit designs through a computer-based system that includes processor farms and cloud-based architectures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional analog circuit design methods are used, then design accuracy and reliability can be maintained, but design cycle time increases and productivity decreases
Solution Approach 1:
The patent replaces manual mechanical design processes with automated computer-based simulation and optimization systems. Computer algorithms automatically generate, simulate, and optimize circuit designs, eliminating the need for manual iteration while maintaining design accuracy through rigorous computational analysis.
Solution Approach 2:
The patent creates virtual copies of circuit designs through simulation models. Multiple virtual instances of the same circuit can be simulated simultaneously under different conditions, allowing rapid evaluation of design variations without physical prototyping or manual redrawing, thus accelerating the design cycle.
2Productivity
If manual analog circuit design is performed, then design flexibility and adaptability are maintained, but resource consumption increases
Solution Approach 1:
The optimization system performs self-service by automatically generating initial circuit designs, evaluating performance metrics, and iteratively improving parameters without requiring continuous human intervention. The system self-adjusts design parameters based on simulation results, reducing the burden on engineer resources while handling complex optimization tasks.
Solution Approach 2:
The design process is segmented into distinct automated stages: initial design generation, simulation evaluation, optimization iteration, and final verification. Each stage is handled by specialized algorithms that process specific aspects of the design independently, making the overall complex process manageable and resource-efficient through systematic decomposition.
3Reliability
If multiple design iterations are performed manually, then design optimization can be achieved, but time consumption increases
Solution Approach 1:
The simulation and optimization system operates continuously without interruption. Multiple design iterations can be executed in parallel or sequential automated fashion, with the system constantly evaluating and improving designs without the breaks and delays inherent in manual processes. This continuous automated action achieves thorough optimization faster.
Solution Approach 2:
The system employs periodic automated evaluation cycles where designs are simulated, analyzed, and optimized in repeated iterations. Each cycle automatically feeds results back into the optimization algorithm, creating a rhythmic process of continuous improvement that rapidly converges on optimal solutions through systematic periodic reinforcement of design refinements.
Data Source
AI summary
A method for analog circuit design includes the steps of (A) simulating a plurality of initial designs of an analog circuit with a simulation that is based on random values and is executed in a computer to generate a plurality of respective yield values, (B) retaining the initial designs of the analog circuit where the respective yield value exceeds a threshold, (C) evaluating the retained designs of the analog circuit with an extreme value analysis to generate respective upper confidence intervals and respective lower confidence intervals of the retained designs, and (D) marking the retained designs as passed where a plurality of electrical specification values of the analog circuit fall below the respective lower confidence intervals. A final design of the analog circuit is based on the retained designs marked as passed.