Pulsed-Current Analog Counter for In-Pixel ADC Charge Accumulation
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Solution Overview
Problem
Legacy analog imagers face challenges with decreasing pixel size, leading to reduced well capacitor to pixel area ratio, which affects Signal-to-Noise Ratio (SNR) and requires improved photo-charge capacity.
Innovation Solution
The implementation of an in-pixel ADC circuit with an analog counter that uses an accumulating capacitor and a control switch to manage charge transfer, allowing for efficient accumulation and reset of charge, thereby improving SNR.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If pixel size is decreased to increase spatial resolution, then imaging resolution is improved, but well capacitor to pixel area ratio decreases leading to reduced photo-charge capacity
Solution Approach 1:
The patent divides the pixel structure into distinct functional regions including a detector diode, a well capacitor, and an in-pixel ADC circuit. This segmentation allows the well capacitor to be optimized for photo-charge storage independent of the overall pixel size, maintaining adequate photo-charge capacity even as pixel dimensions decrease for higher spatial resolution
Solution Approach 2:
The patent implements an in-pixel ADC circuit that integrates multiple functional blocks (integrator, comparator, counter, and control logic) within the pixel itself. This nested integration allows the ADC to directly process photo-charge from the detector diode through the well capacitor without external processing, maximizing the use of available photo-charge capacity within the constrained pixel area
2Quantity of substance
If well capacitor size is increased to improve photo-charge capacity, then SNR is improved, but pixel area increases reducing spatial resolution
Solution Approach 1:
The patent merges the ADC functionality directly into the pixel structure, combining the detector diode, well capacitor, integrator, comparator, and counter into a single integrated pixel unit. This merging eliminates the need for separate external processing circuits, allowing adequate photo-charge capacity to be achieved within a compact pixel area by efficient functional integration
Solution Approach 2:
The patent transitions from traditional external ADC processing to in-pixel ADC integration, effectively adding a new dimensional aspect to pixel design. By embedding the ADC functionality within the pixel plane, the system achieves enhanced photo-charge capacity without increasing the two-dimensional pixel footprint, as the processing functions are layered within the existing pixel structure
3Quantity of substance
If in-pixel ADC circuit is implemented to improve photo-charge capacity, then SNR approaches theoretical limits, but device complexity increases
Solution Approach 1:
The patent designs the in-pixel ADC circuit with multi-functional blocks that perform multiple operations. The integrator accumulates photo-charge, the comparator thresholds the accumulated charge, and the counter digitizes the signal. Each block serves multiple purposes within the ADC conversion process, reducing the total number of separate components needed and thereby managing device complexity while achieving near-theoretical SNR limits
Solution Approach 2:
The patent employs a periodic reset mechanism where the integrator is reset after each conversion cycle, and the counter is cleared after digitizing the photo-charge signal. This periodic action allows the circuit to process multiple frames sequentially, with each frame completing a full ADC conversion cycle. The regular periodic operation simplifies control logic and timing requirements, managing device complexity through predictable cyclic behavior
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enhances the SNR by effectively managing charge accumulation and reset, allowing for near-theoretical limits of photo-charge storage and improved imaging performance.
Implementation Method 1
Charge from a photodiode is accumulated over an integration capacitor
Data Source
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AI summary
An analog counter circuit for use with a digital pixel includes an input; an output; a first inverter connected to the input that produces on a first inverter output a time delayed inverted signal (RP*) from an input signal received at the input; a second inverter connected to the first inverter output that produces a time delayed signal (RP) at a second inverter output from the input signal and that is delayed relative to RP* and a control switch connected between a source voltage and a floating node. The control switch is controlled by the signal RP* on the first inverter output. The analog counter also includes a feedback capacitor connected between the second inverter output and the floating node; an accumulating capacitor that accumulates at least some of a charge that passes through the control switch; and an injection switch connected between the control switch and the accumulating capacitor.