Analog Counter Readout With Self-Correcting Pixel Voltage Comparison
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Solution Overview
Problem
Proximity of digital pixels in image capture devices leads to noise in voltage readouts, and existing calibration methods require significant processing and power, especially when adjacent pixels produce different voltages for the same count value.
Innovation Solution
A method and apparatus for an analog counter circuit that includes a storage capacitor and a comparator circuit to compare a dummy voltage with the stored voltage, determining the actual voltage when the dummy voltage falls below the stored voltage, allowing for efficient readout and reducing noise and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If digital pixels are placed close together to increase pixel density, then the image capture device can achieve higher resolution, but noise is introduced in the voltage readout affecting measurement precision
Solution Approach 1:
The patent applies preliminary action by performing calibration during the manufacturing process to establish correction values for each pixel's voltage offset. These correction values are stored and applied during normal operation to compensate for noise and voltage variations, thereby maintaining measurement precision despite high pixel density.
Solution Approach 2:
The patent changes the voltage parameter by applying correction values to compensate for voltage offsets in adjacent pixels. The readout circuit adjusts the voltage measurement by adding or subtracting the stored correction value, thereby eliminating the noise introduced by pixel proximity and restoring measurement accuracy.
2Measurement precision
If calibration is performed off-chip to correct voltage variations between adjacent pixels, then measurement precision can be maintained, but processing time and power consumption increase significantly
Solution Approach 1:
The patent replaces the mechanical/off-chip calibration process with an integrated on-chip calibration system. The calibration circuitry is built into the image capture device, allowing correction values to be determined and applied electronically without requiring external processing equipment, thereby reducing power consumption and processing time.
Solution Approach 2:
The patent implements self-service by enabling the image capture device to perform its own calibration internally. The device uses its built-in circuitry to determine correction values during manufacturing and store them for ongoing use, eliminating the need for external calibration equipment and reducing both power consumption and processing requirements.
3Measurement precision
If calibration is performed off-chip to correct voltage variations, then measurement precision can be maintained, but the processing time and device complexity increase
Solution Approach 1:
The patent merges the calibration function with the main image capture device by integrating calibration circuitry directly into the pixel array. This consolidation combines the calibration and imaging functions into a single device, reducing overall system complexity while maintaining measurement precision through on-chip voltage correction.
4Device complexity
If traditional readout methods are used for analog counter circuits, then the circuit design is simpler, but noise from adjacent pixels degrades the voltage readout accuracy
Solution Approach 1:
The patent introduces an intermediary correction value that mediates between the simple traditional readout method and the need for accurate voltage measurement. The stored correction value acts as a mediator that compensates for noise without requiring complex readout circuitry, thereby maintaining circuit simplicity while improving measurement precision.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables accurate and efficient voltage readout from analog counter circuits, reducing noise and power requirements while maintaining calibration accuracy across digital pixels.
Implementation Method 1
storing a voltage from the analog counter to a storage capacitor of a read out circuit
Implementation Method 2
comparing the voltage at the storage capacitor to the dummy voltage level to read out the voltage stored at the readout circuit
Data Source
AI summary
A digital unit cell, readout circuit for a digital unit cell and a method of operating an analog counter of a digital unit cell is disclosed. The readout circuit includes storage capacitor for storing a voltage remaining at an analog counter at the end of an integration period, and a comparator circuit. The comparator circuit compares a dummy voltage provided from the analog counter during a readout period to the voltage at the storage capacitor, and determines the voltage at the storage capacitor when the dummy voltage falls below the voltage at the storage capacitor.