Analog In-Memory Crossbar ECC for Single-Cycle Error Detection

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Solution Overview

Problem

Analog computing devices based on crossbar arrays face inaccuracies due to programming errors and noise during readout, which affect the accuracy of vector-matrix computations, and significant outliers can pose a problem unless detected and corrected.

Innovation Solution

A circuit implementation that connects three crossbar array portions to enable single-cycle analog error detection and correction, using a first portion for the target computation matrix, a second for the encoder matrix, and a third for the decoder matrix, allowing for reverse DPE operations to determine error locations without the need for a separate look-up table.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If traditional analog crossbar computing is used, then computational speed is improved, but accuracy deteriorates due to programming errors and noise

Engineering Contradiction:
Improvecomputational speedVSAvoidcomputational accuracy
Core Design Contradiction:
SpeedVSMeasurement precision

Solution Approach 1:

The patent combines the computation crossbar array with error detection and correction crossbar arrays into a unified analog computing system. The computation portion performs vector-matrix multiplication while the integrated ECC portions simultaneously detect and correct errors, merging computational and error-correction functions into a single analog system that maintains high speed while improving accuracy.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent introduces syndrome vectors as an intermediary mechanism between computation and error correction. The syndrome vector crossbar array processes computation results to generate syndrome vectors that indicate errors, which then guide the correction process. This intermediary approach enables accurate error detection and correction without significantly impacting computational speed.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If separate look-up tables are used for error correction, then error detection capability is improved, but device complexity increases

Engineering Contradiction:
Improveerror detection capabilityVSAvoidsystem complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent replaces traditional digital look-up tables and iterative software-based error correction algorithms with analog crossbar array operations. The third crossbar array portion performs reverse dot-product operations to directly compute error locations in analog form, eliminating the need for complex digital look-up tables and reducing overall system complexity while maintaining strong error detection capability.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Measurement precision

If multiple crossbar arrays are connected for error correction, then accuracy is improved, but power consumption increases

Engineering Contradiction:
Improvecomputational accuracyVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent pre-loads the encoder matrix into the second crossbar array portion and the decoder matrix into the third crossbar array portion before computation. This preliminary action allows the error detection and correction portions to operate efficiently during the actual computation cycle, reducing the need for repeated matrix loading and minimizing overall power consumption while maintaining high computational accuracy.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS12063052B2Analog error detection and correction in analog in-memory crossbars
Publication Date: 2024.08.13 HEWLETT PACKARD ENTERPRISE DEV LP
  • US12063052B2 patent drawing
  • US12063052B2 patent drawing
  • US12063052B2 patent drawing

AI summary

An analog error correction circuit is disclosed that implements an analog error correction code. The analog circuit includes a crossbar array of memristors or other non-volatile tunable resistive memory devices. The crossbar array includes a first crossbar array portion programmed with values of a target computation matrix and a second crossbar array portion programmed with values of an encoder matrix for correcting computation errors in the matrix multiplication of an input vector with the computation matrix. The first and second crossbar array portions share the same row lines and are connected to a third crossbar array portion that is programmed with values of a decoder matrix, thereby enabling single-cycle error detection. A computation error is detected based on output of the decoder matrix circuitry and a location of the error is determined via an inverse matrix multiplication operation whereby the decoder matrix output is fed back to the decoder matrix.