Distributed Analog CTLE DAC for SerDes Bandwidth Extension
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Solution Overview
Problem
Existing methods for bandwidth extension in SerDes transmitters, such as using digital FIR for pre-emphasis or CTLE with spectral shaping, either consume additional power, reduce the dynamic range, or attenuate the wanted signal, and are hindered by large inductor components that increase size and power consumption.
Innovation Solution
Incorporating a distributed analog transmission continuous-time linear equalizer (CTLE) in a passive method within the transmitter, which includes a plurality of branches with amplifiers and filter circuits, allowing for voltage driver output stages and avoiding signal attenuation while reducing component size and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If digital FIR pre-emphasis is used for bandwidth extension, then transmission rate capability is improved, but power consumption increases
Solution Approach 1:
The patent replaces digital signal processing (FIR filtering) with an analog continuous-time linear equalizer (CTLE) implementation. This substitution moves the bandwidth extension function from the digital domain to the analog domain, eliminating the need for power-consuming digital filters while achieving the same bandwidth extension effect through analog circuitry with resistors and capacitors.
Solution Approach 2:
The patent changes the operational parameters by implementing the equalizer in the continuous-time analog domain rather than discrete-time digital domain. This parameter change allows the system to achieve bandwidth extension through analog RC time constants and transfer functions, which consume significantly less power than digital signal processing operations.
2Speed
If CTLE with spectral shaping is used for bandwidth extension, then transmission rate capability is improved, but the wanted signal is attenuated
Solution Approach 1:
The patent applies different RC time constants and filtering characteristics to different frequency ranges within the signal spectrum. The continuous-time linear equalizer uses multiple poles and zeros positioned at specific frequencies to provide selective amplification of high-frequency components while maintaining or boosting low-frequency signal levels, thus achieving spectral shaping without overall signal attenuation.
3Speed
If large inductor components are used for bandwidth extension, then transmission rate capability is improved, but device size increases
Solution Approach 1:
The patent substitutes inductor-based LC resonant circuits with resistor-capacitor (RC) based continuous-time linear equalizer circuits. This substitution eliminates the need for large physical inductor components, achieving the same bandwidth extension function through compact RC time constants and transfer function design, thereby dramatically reducing the device footprint.
4Speed
If large inductor components are used for bandwidth extension, then transmission rate capability is improved, but power consumption increases
Solution Approach 1:
The patent replaces inductor-based resonant circuits with resistor-capacitor based continuous-time linear equalizer circuits. This substitution eliminates the power losses associated with large inductor components (including core losses and resistive losses in windings) while achieving the same bandwidth extension effect through RC time constants, thereby significantly reducing overall power consumption.
Data Source
AI summary
A digital to analog converter (DAC) includes a first amplifier configured to receive a first bit of a data block as an input and output a first signal based on a value of the first bit of the data block, a first filter circuit configured to filter the first signal, an output configured to output an analog signal based on a combination of the filtered first signal and a second signal that represents a value of a second bit of the data block.


