Analog Equalizer Reduces ADC Bit Depth for Echo Cancellation

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Solution Overview

Problem

Existing digital signal processing (DSP) systems face limitations in high baud rate applications due to the design of analog-to-digital converters, which struggle with inter-symbol interference, echo, and quantization noise, particularly at high frequencies.

Innovation Solution

Processing analog signals in the analog domain using a delay line with multiple stages, where signals are delayed and combined with error signals to generate adaptive tap weights, reducing the need for high-resolution A-to-D conversion by removing impairments before digitization.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If digital signal processing is used to remove inter-symbol interference and echo, then signal quality improves, but the design of analog-to-digital converter becomes critical and complex at high baud rates

Engineering Contradiction:
Improvesignal qualityVSAvoidA-to-D converter design
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by performing equalization and echo cancellation in the analog domain before the signal is converted to digital. The analog equalizer processes the signal to remove inter-symbol interference and echo impairments beforehand, so that when the signal is later digitized, the A-to-D converter operates on already-cleaned signal data, reducing its complexity requirements.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent substitutes the digital signal processing mechanism with an analog signal processing mechanism. Instead of using complex digital equalization algorithms after A-to-D conversion, the system uses analog equalization circuits before conversion, replacing the digital processing approach with an analog one that has different complexity characteristics.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Productivity

If higher baud rates are used to increase data rate, then productivity improves, but the design of A-to-D converter becomes more difficult due to increased susceptibility to interference and quantization noise

Engineering Contradiction:
Improvedata rateVSAvoidA-to-D converter design
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent removes inter-symbol interference and echo effects in the analog domain before digitization, so that at higher baud rates where these impairments are more severe, the signal is already cleaned up before the A-to-D converter processes it, allowing higher data rates without proportionally increasing converter complexity.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces an analog equalizer as an intermediary between the transmitted signal and the A-to-D converter. This intermediary component specifically addresses the interference and noise problems that worsen at high baud rates, acting as a mediator that protects the subsequent digital processing stages from the harsh conditions of high-speed transmission.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Measurement precision

If analog signal processing is performed before A-to-D conversion, then the required number of bits for conversion is reduced, but additional analog processing stages are required

Engineering Contradiction:
Improveconversion resolutionVSAvoidanalog processing stages
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent segments the signal processing function into distinct analog and digital portions. The analog equalizer handles the equalization and echo cancellation functions separately in the analog domain, while the A-to-D converter then performs a simpler conversion with reduced bit requirements. This segmentation allows each component to be optimized independently for its specific function.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS8811599B2Systems, circuits and methods for dual transformer duplexing
Publication Date: 2014.08.19 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LTD
  • US8811599B2 patent drawing
  • US8811599B2 patent drawing
  • US8811599B2 patent drawing

AI summary

A circuit for the analog correlation of a signal to remove impairments such as echo, cross talk and intersymbol interference is described. A duplexing circuit which improves echo response by providing a second transformer is described.