Analog Floating-Gate Memory Using Unitary Polysilicon Electrode
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Solution Overview
Problem
Conventional analog integrated circuits face challenges in achieving precise and stable reference voltages due to manufacturing variations and leakage issues in capacitor dielectric films, particularly when using floating-gate technology, which requires additional costly processes and results in inconsistent diode quality and programming variability.
Innovation Solution
A programmable analog floating-gate element is developed using a unitary polycrystalline silicon electrode doped to a single conductivity type, allowing it to serve as gate electrodes for both p-channel and n-channel transistors, eliminating parasitic diodes and enabling precise charge trapping and programming through tunnel capacitors, compatible with existing CMOS manufacturing processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional capacitor dielectric films (e.g., silicon nitride deposited by PECVD) are used in floating-gate capacitor technology, then analog integrated circuits can be manufactured, but leakage occurs over time requiring additional costly processes
Solution Approach 1:
The patent extracts the problematic capacitor dielectric layer from the structure entirely. Instead of using conventional capacitor dielectric films like silicon nitride that leak over time, the invention eliminates this layer and directly forms the floating gate electrode over the tunnel oxide, thereby removing the source of leakage and the need for additional corrective manufacturing processes
Solution Approach 2:
The patent replaces expensive, complex manufacturing processes with simpler, more cost-effective methods. By eliminating the need for PECVD silicon nitride deposition and associated patterning steps, the invention uses a straightforward tunnel oxide formation process that is both cheaper and more reliable, accepting that the tunnel oxide serves its purpose without requiring additional protective dielectric layers
2Manufacturing precision
If floating-gate capacitor technology is used for trimming, then precision can be achieved, but additional costly processes such as deposition of dielectric films and patterning of conductor layers are required
Solution Approach 1:
The patent merges the floating gate electrode formation with the existing transistor gate formation process. The same polysilicon layer and doping steps that create the transistor gates are used to form the floating gate electrodes, eliminating the need for separate dielectric film deposition and conductor layer patterning processes while maintaining trimming precision
Solution Approach 2:
The patent makes the polysilicon layer serve multiple functions: it forms both the transistor gates and the floating gate electrodes for trimming capacitors. This multi-functional approach eliminates the need for dedicated trimming structure fabrication processes, reducing manufacturing complexity while preserving the precision benefits of floating-gate technology
3Reliability
If conventional floating-gate structures are used, then programming can be achieved, but diode quality is inconsistent and programming variability increases
Solution Approach 1:
The patent changes the critical parameter from diode junction quality to tunnel oxide thickness and quality. By controlling the tunnel oxide formation process (through thermal oxidation or deposition) to achieve uniform thickness and high quality, the invention ensures consistent programming characteristics across all devices, replacing reliance on diode quality with reliance on oxide quality which is more controllable
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution provides precise and stable analog memory functions, reduces manufacturing complexity, and enhances programming efficiency by eliminating parasitic diodes, thus improving the reliability and consistency of analog circuit operations.
Implementation Method 1
Programming of the device is accomplished through such mechanisms as Fowler-Nordheim tunneling
Implementation Method 2
Programming of the device is accomplished through such mechanisms as Fowler-Nordheim tunneling, and hot carrier injection
Data Source
AI summary
An analog floating-gate electrode in an integrated circuit, and method of fabricating the same, in which trapped charge can be stored for long durations. The analog floating-gate electrode is formed in a polycrystalline silicon gate level, doped n-type throughout its length, and includes portions serving as gate electrodes of n-channel and p-channel MOS transistors; a plate of a metal-to-poly storage capacitor; and a plate of poly-to-active tunneling capacitors. The p-channel MOS transistor includes a buried channel region, formed by way of ion implantation, disposed between its source and drain regions. Silicide-block silicon dioxide blocks the formation of silicide cladding on the electrode, while other polysilicon structures in the integrated circuit are silicide-clad.