Analog Self-Interference Reconstruction for Full Duplex ADC Limits

The patent introduces an analog self-interference cancellation path as an intermediary mechanism between the transmit signal and the receiver. This analog path processes the self-interference signal before it enters the ADC, using a power combiner to merge the canceled signal with the received signal. This mediator approach allows cancellation of strong self-interference components (exceeding 60 dB above wanted signal) that would otherwise saturate the ADC and prevent effective digital cancellation.

The patent segments the self-interference cancellation process into two distinct parts: an analog cancellation path for handling strong self-interference components (second-type) and a digital baseband cancellation path for handling residual interference. The analog path uses power combiners and signal processing before ADC to reduce the burden on ADC dynamic range, while the digital path handles remaining cancellation tasks. This segmentation allows the system to achieve high cancellation performance without requiring ADC/DAC with excessively large dynamic ranges.