Analog Interleaver Gain-Mixing for Bandwidth and Spur Control
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Solution Overview
Problem
Existing digital-to-analog converters face challenges in achieving high-speed conversion rates due to bandwidth limitations and clock feedthrough issues in interleaving topologies, which restrict data bandwidth to below half the sample rate.
Innovation Solution
An interleaver design comprising two signal paths with different gain stages and mixers, utilizing 180-degree clock phase difference to cancel clock feedthrough and achieve feed-forward equalization, allowing for simultaneous interleaving and equalization without additional frequency spurs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a higher speed DAC is achieved by combining two lower speed DACs with 180 degree phase difference, then the sample rate is doubled, but the sinc function zero at fs still limits the bandwidth to below fs/2
Solution Approach 1:
The patent changes the spectral parameters by introducing different gain factors (a and b) for the two interleaved signals. By making the gains different, the combined spectrum no longer has a zero at fs, thereby extending the usable bandwidth beyond fs/2 while maintaining the doubled sample rate advantage
2Productivity
If an analog switch is used to choose between two input signals during different clock cycles, then interleaving is achieved, but clock feedthrough causes extra mixing products
Solution Approach 1:
The patent extracts the harmful clock feedthrough component by using different gain factors for the two signal paths. The unequal gains cause the clock feedthrough products to appear at different amplitude levels, allowing them to be separated and filtered out, thereby removing the harmful mixing products while maintaining high-speed interleaving
3Reliability
If addition interleaving is used to combine two DAC outputs, then the sampling images are canceled, but the sinc function zero cannot be compensated
Solution Approach 1:
The patent merges the image cancellation function with the bandwidth extension function by using differential gain interleaving. The same gain adjustment mechanism that extends bandwidth also maintains the image cancellation property, thereby achieving both goals simultaneously without requiring additional equalization complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The interleaver effectively compensates for bandwidth limitations and cancels clock feedthrough, enabling data interleaving up to the sample frequency with an output spectrum equivalent to a single high-speed DAC, while maintaining the sinc function and eliminating additional frequency spurs.
Implementation Method 1
a mixer and a second gain stage adapted for multiplying a signal coming from the input terminal with a predefined or modifiable second gain (b) before or after mixing it with a clock signal using the mixer to obtain a second signal
Implementation Method 2
an adder adapted for adding the first signal and the second signal to obtain an output signal of the signal path
Implementation Method 3
a first gain stage adapted for multiplying a signal coming from the input terminal with a predefined or modifiable first gain (a) to obtain a first signal
Implementation Method 4
for at least one of the signal paths the first gain is different from the second gain such that feed-forward equalization is achieved at the output of the interleaver to compensate for a bandwidth limitation of the channel
Implementation Method 5
the interleaver moreover comprises an adder adapted for adding the output signals from the signal paths to obtain the analog signal at an output terminal of the interleaver
Data Source
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AI summary
An interleaver (100) for combining at least two incoming signals into an analog output signal which comprises at least a first signal path (110) and a second signal path (120). Each signal path (110, 120) comprises: an input terminal (111, 121), a first gain stage (113, 123) for multiplying a signal coming from the input terminal with a first gain (a) to obtain a first signal, a mixer (112, 122) and a second gain stage (114, 124) for multiplying a signal coming from the input terminal with a second gain (b) before or after mixing it with a clock signal to obtain a second signal, an adder (115, 125) for adding the first and second signal to obtain an output signal of the signal path wherein the first and second gain are different from zero. The interleaver comprises an adder (140) for adding the output signals from the signal paths.