Analog I/O Fault Detection Using Toggle Activity Monitoring
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Solution Overview
Problem
Current semiconductor systems-on-a-chip (SOCs) have inadequate defect coverage in analog input/output (I/O) circuitry during built-in self-tests, particularly for analog I/O circuits that are susceptible to failures due to long-distance signal routing and lack of critical timing issues, leading to potential failures that are not detected during self-tests.
Innovation Solution
The implementation of activity monitor and fault detection circuitry within the analog I/O modules to detect unexpected stimuli patterns, providing early warnings of potential failures and enhancing diagnostic coverage, which can be activated in test mode or run in the background to identify and remediate issues, thereby improving reliability and safety metrics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If activity monitor and fault detection circuitry are added to analog I/O modules, then defect coverage and reliability are improved, but device complexity increases
Solution Approach 1:
The fault detection circuitry is integrated within the existing analog I/O module structure, nesting the monitoring functionality inside the module rather than adding external components. The activity monitor is embedded within the analog I/O module, utilizing existing resources and reducing overall system complexity despite adding detection capabilities
Solution Approach 2:
The analog I/O module performs self-diagnosis through the integrated activity monitor that automatically detects faults and generates defect indicators without requiring external testing equipment. The module monitors its own internal signals and controls to identify defects autonomously
2Reliability
If more analog I/O circuits are tested during self-test, then defect coverage is improved, but test time and productivity are reduced
Solution Approach 1:
The system performs rapid self-tests on analog I/O circuits during manufacturing before customer application code is loaded. The activity monitor continuously monitors circuit activity during normal operation, detecting faults that would otherwise require extended dedicated test time
Solution Approach 2:
The fault detection operates continuously during normal device operation rather than requiring separate dedicated test periods. The activity monitor runs in the background throughout the device lifecycle, converting operational time into productive testing time without interrupting normal functionality
3Reliability
If trim controls are exercised during BIST, then defect coverage is improved, but analog circuit performance may be degraded
Solution Approach 1:
The activity monitor performs partial monitoring of trim control signals rather than fully exercising the analog circuits. It detects unexpected activity patterns in trim controls without actually applying trim adjustments that would degrade analog performance, achieving defect detection through signal monitoring rather than functional activation
Data Source
AI summary
An integrated circuit includes an input/output (I/O) circuit configured to receive a first signal and a second signal and a fault detection circuit. The I/O circuit includes an I/O terminal, an I/O buffer, and a pull resistor having a first terminal coupled to the I/O terminal. The fault detection circuit is configured to determine whether a predetermined number of toggles of the first signal occurs while the second signal is held at a constant logic state, assert a fault indicator when the predetermined number of toggles occurs, and negate the fault indicator when the predetermined number of toggles does not occur.