Analog Layout Generation Using Connection Graph Matching
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Solution Overview
Problem
Modern analog circuit design in SoC requires more stringent performance specifications, making existing automatic placement and routing methods inadequate due to their inability to incorporate expert knowledge and design preferences effectively.
Innovation Solution
A knowledge-based analog layout generation system that utilizes a design repository to match and generate layouts by comparing a target design's connection graph to stored legacy designs, extracting common patterns, and adapting them to new technologies, thereby incorporating expert knowledge and preferences.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If automatic placement and routing methods are used, then productivity is improved, but manufacturing precision deteriorates because they cannot incorporate expert knowledge and design preferences
Solution Approach 1:
The system creates a connection graph representation of the target design and compares it against stored connection graphs from legacy designs in a database. By copying and adapting proven layout patterns from the database that match the target design's connection graph, the system automatically generates high-quality layouts that incorporate expert knowledge while maintaining efficiency.
2Manufacturing precision
If manual layout design is used, then manufacturing precision is improved through expert knowledge, but productivity deteriorates due to time-consuming processes
Solution Approach 1:
The system enables automatic layout generation by having the computer automatically compare the target design's connection graph against the database of stored connection graphs, identify matches, and select appropriate layouts. This self-service automation eliminates the need for manual layout design while preserving the quality benefits of expert knowledge through the stored connection graphs.
3Manufacturing precision
If layout constraints are applied to minimize parasitic impact, then manufacturing precision is improved, but adaptability deteriorates because designer preferences cannot be expressed
Solution Approach 1:
The connection graph representation serves multiple functions: it captures the circuit topology for parasitic minimization through constraint application, and simultaneously enables matching with stored legacy designs that encode designer preferences and expertise. This universal representation method allows the system to achieve both precision and adaptability.
Data Source
AI summary
A computer-implemented method for generating a layout of a design includes invoking the computer to receive a schematic representation of the design, generating a connection graph associated with the design, comparing the connection graph with a plurality of connection graphs stored in a database and selecting a layout associated with the matching connection graph in generating the layout of the design.


