Analog Layout Prototyping via Routing Preservation
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Solution Overview
Problem
Current methods for generating analog circuit layouts struggle to systematically preserve the correlation between wiring and block placement, leading to inefficiencies in layout reuse and increased design cycle times due to the sensitivity of analog IC electrical characteristics to circuit block placement and routing.
Innovation Solution
A computer-implemented method that extracts and preserves the position of source paths between blocks in the source layout, using Constrained Delaunay Triangulation to transform the layout into a planar straight-line graph, which maintains the geometric relationship between blocks and routing paths, allowing for efficient generation of new layouts that retain the original routing behavior.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If automated placement and routing are used to migrate analog circuit layouts to new technology nodes or fabs, then engineering cost is reduced, but the sensitivity of analog IC electrical characteristics to placement and routing causes performance degradation
Solution Approach 1:
The system performs preliminary extraction of routing information from the source layout before migration, storing routing topology, wire paths, and geometric relationships in advance. This preliminary action enables the target layout to reconstruct accurate routing structures that preserve analog electrical characteristics while using automated placement tools.
Solution Approach 2:
The patent introduces an intermediary routing information extraction and representation layer between the source and target layouts. This intermediary structure captures essential routing behaviors and serves as a guide during automated placement, ensuring that the generated layout maintains both cost efficiency and electrical performance.
2Reliability
If manual layout design is used to ensure high electrical performance in analog circuits, then reliability is improved, but design cycle time increases
Solution Approach 1:
The system copies essential routing information from the high-performance manual source layout, including wire paths, topology, and geometric relationships. This copied routing data is then applied to guide automated layout generation, replicating the performance benefits of manual design while eliminating the time-consuming iterative refinement process.
Solution Approach 2:
The patent transforms routing information into structured parameters and constraints that can be processed by automated tools. By changing the representation of routing data from graphical to parametric form, the system enables automated generation of layouts that maintain the electrical performance characteristics of manual designs.
3Productivity
If routing information is extracted from source layout for layout reuse, then layout generation efficiency is improved, but preserving the correlation between placement and routing becomes complex
Solution Approach 1:
The system segments routing information extraction into distinct components: routing topology extraction, wire path extraction, and geometric relationship extraction. This segmentation simplifies the overall complexity by breaking down the routing preservation task into manageable, independent modules that can be processed separately and then integrated.
Solution Approach 2:
The patent introduces an intermediary data structure that captures the correlation between placement and routing in a structured format. This intermediary representation serves as a bridge between placement information and routing constraints, simplifying the preservation of their relationships during automated layout generation.
Data Source
AI summary
A computer implemented method for routing preservation is presented. The method includes decomposing, using the computer, a geometric relationship between a first module, a second module, and a routing path of a source layout, when the computer is invoked to route the solution path. The method further includes disposing, using the computer, the routing path in a solution layout in accordance with the geometric relationship. The solution layout is not defined by a scaling of the source layout.