Current-Mode Analog MAC Circuits for Clock-Free Low-Power AI
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Solution Overview
Problem
Current analog current-mode multipliers and multiply-accumulate circuits in integrated circuits face challenges in achieving small size, low cost, low current consumption, asynchronous operation, reduced memory usage, and compatibility with low power supply voltages, while maintaining accuracy and reliability in machine learning and artificial intelligence applications.
Innovation Solution
The development of analog current-mode multipliers and multiply-accumulate circuits utilizing substrate vertical Bipolar-Junction-Transistors (vBJT) in CMOS fabrication, which operate in the subthreshold region, eliminating the need for resistors and capacitors, and employing current-mode digital-to-analog converters to achieve scalable, symmetric, and low-power designs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If digital computation is used, then accuracy and reliability are improved, but power consumption increases due to memory read-and-write cycles
Solution Approach 1:
The patent extracts the memory component from the computation system, implementing direct analog computation that processes data without storing it in memory. The multiply-accumulate operation is performed directly in the analog domain using current-mode circuits, eliminating the need for memory read-and-write cycles that consume power in digital systems.
Solution Approach 2:
The patent replaces the mechanical/digital computation system with an analog current-mode system. Instead of using digital logic gates, registers, and memory cells that require clock signals and sequential operations, the invention uses continuous analog currents to perform mathematical operations directly, substituting the discrete digital mechanism with a continuous analog process.
2Speed
If clock-based digital computation is used, then computation speed is improved, but noise from clocks and digital dynamic power consumption increases
Solution Approach 1:
The patent substitutes the clock-based digital computation mechanism with an analog current-mode system that operates without periodic clock signals. The computation speed is determined by the inherent response time of the analog circuits rather than by clock frequency, eliminating the generation of clock-related electromagnetic noise while maintaining computational throughput.
3Ease of manufacture
If standard CMOS fabrication is used, then manufacturing cost and availability are improved, but operating voltage must be high which increases power consumption
Solution Approach 1:
The patent changes the operating parameters of the CMOS transistors by operating them in the subthreshold region rather than in the saturation or triode regions. This parameter change allows the circuits to function at very low voltages (below the threshold voltage), dramatically reducing power consumption while still using standard CMOS fabrication processes that are cost-effective and widely available.
4Ease of operation
If resistors and capacitors are used in analog circuits, then circuit functionality is improved, but manufacturing size and cost increase
Solution Approach 1:
The patent extracts and removes resistors and capacitors from the circuit design, implementing functionality that traditionally required these passive components using only active transistor elements. The current-mode topology achieves multiplication and accumulation functions through transistor current relationships rather than through RC time constants or resistive voltage division, significantly reducing the die area.
Solution Approach 2:
The patent makes the active transistors perform multiple functions: they serve as switches, amplifiers, and mathematical operation elements simultaneously. The same transistor elements that control current flow also perform the multiplication and accumulation functions, eliminating the need for separate passive components and reducing overall circuit complexity and area.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
These circuits achieve efficient, low-power, and compact designs that support high-speed operations with reduced power consumption, improved temperature and voltage stability, and enhanced accuracy, suitable for portable AI & ML applications.
Implementation Method 1
employing current-mode digital-to-analog converters to achieve scalable, symmetric, and low-power designs
Implementation Method 2
utilizing substrate vertical Bipolar-Junction-Transistors (vBJT) in CMOS fabrication
Data Source
AI summary
Analog multipliers can perform signal processing with approximate precision asynchronously (clock free) and with low power consumptions, which can be advantageous including in emerging mobile and portable artificial intelligence (AI) and machine learning (ML) applications near or at the edge and or near sensors. Based on low cost, mainstream, and purely digital Complementary-Metal-Oxide-Semiconductor (CMOS) manufacturing process, the present invention discloses embodiments of current-mode analog multipliers that can be utilized in multiply-accumulate (MAC) signal processing in end-application that require low cost, low power consumption, (clock free) and asynchronous operations.