Analog In-Memory MAC Processing Using Mirror Currents

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Solution Overview

Problem

Current neural network processing technologies face inefficiencies in performing multiply-accumulate (MAC) operations, which are crucial for deep learning tasks, as they often rely on digital computers and lack efficient in-memory processing capabilities.

Innovation Solution

A processing apparatus comprising a bit cell line with bit cells connected in series, a mirror circuit unit to replicate currents, a charge charging unit to charge voltages corresponding to MAC operations, and a voltage measuring unit to output results, enabling in-memory processing of MAC operations through analog circuits.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If digital computers are used to perform MAC operations, then programming flexibility is maintained, but processing efficiency and speed are insufficient for deep learning applications

Engineering Contradiction:
ImproveMAC operation processing efficiencyVSAvoidhardware architecture complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent replaces the digital computer architecture with an analog neural network architecture where continuous voltage signals directly represent and process data. The neural network performs MAC operations through analog voltage multiplication and addition, eliminating the need for discrete digital processing steps and thereby significantly improving processing efficiency for deep learning applications.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent changes the fundamental parameter representation from discrete digital values to continuous analog voltage values. By using continuous voltage signals to represent data and weights, the system achieves parallel processing of multiple MAC operations simultaneously through the physical properties of electrical circuits, thereby enhancing productivity without requiring complex digital logic.

Inventive Principle:
Principle #35Parameter changes

2Speed

If in-memory processing is implemented, then processing speed improves, but memory access operations become more complex

Engineering Contradiction:
Improveprocessing speedVSAvoidmemory processing architecture complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent merges the memory storage function with the processing computation function into a unified neural network architecture. The same analog circuitry that stores data as voltage levels also performs the MAC operations, eliminating the need for separate memory access steps and thereby achieving in-memory processing that simultaneously improves speed and reduces architectural complexity.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The neural network performs self-processing by directly manipulating voltage signals within its own circuitry. The analog circuits automatically execute multiplication and addition operations through their physical characteristics, without requiring external memory access or complex control logic, thereby achieving fast in-memory processing with simplified architecture.

Inventive Principle:
Principle #25Self-service

3Productivity

If analog circuits are used for MAC operations, then processing efficiency improves, but measurement precision requirements increase

Engineering Contradiction:
ImproveMAC operation throughputVSAvoidvoltage measurement precision
Core Design Contradiction:
ProductivityVSMeasurement precision

Solution Approach 1:

The patent uses voltage dividers and current mirrors to create precise copies of voltage and current signals. By replicating the input voltage and weight current through controlled resistor networks, the system maintains measurement precision while enabling parallel analog processing. The voltage divider circuits accurately proportion voltages and the current mirror circuits precisely copy current levels, ensuring high precision in analog MAC operations.

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The patent introduces voltage dividers and current mirrors as intermediary circuits between the input signals and the final output. These intermediary components serve as precision measurement and control elements that accurately represent the input values while enabling the analog computation. The voltage divider acts as an intermediary to precisely scale voltages, and the current mirror acts as an intermediary to precisely replicate currents, thereby maintaining measurement precision in the analog processing path.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution enhances the efficiency of MAC operations by allowing for in-memory processing, improving the speed and reliability of neural network computations, particularly in deep learning applications.

Implementation Method 1

a mirror circuit unit configured to generate a mirror current by replicating a current flowing through the bit cell line at a ratio

Methodology Applied
Scientific EffectCurrent mirroring:

Implementation Method 2

a charge charging unit configured to charge a voltage corresponding to the mirror current as the mirror current replicated by the mirror circuit unit is applied

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS11581042B2Processing apparatus and electronic device including the same
Publication Date: 2023.02.14 SAMSUNG ELECTRONICS CO LTD
  • US11581042B2 patent drawing
  • US11581042B2 patent drawing
  • US11581042B2 patent drawing

AI summary

Provided are processing and an electronic device including the same. The processing apparatus includes a bit cell line comprising bit cells connected in series, a mirror circuit unit configured to generate a mirror current by replicating a current flowing through the bit cell line at a ratio, a charge charging unit configured to charge a voltage corresponding to the mirror current as the mirror current replicated by the mirror circuit unit is applied, and a voltage measuring unit configured to output a value corresponding to a multiply-accumulate (MAC) operation of weights and inputs applied to the bit cell line, based on the voltage charged by the charge charging unit.