Analog Memory Cell Programming via Responsiveness-Based Pulse Shaping

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Solution Overview

Problem

Analog memory cells in memory devices often exhibit varying responsiveness to programming signals, leading to wide distributions of stored data values that can result in read errors due to aging-related drift, with highly responsive cells being more susceptible to over-programming and data disturbs.

Innovation Solution

Applying different patterns of programming pulses to high- and low-responsiveness cells within a group, causing high-responsiveness cells to store levels above the nominal value and low-responsiveness cells to store levels below the nominal value, which narrows the programming state distribution over time, improving data separation and reducing read errors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If uniform programming pulses are applied to all memory cells, then the programming process is simple, but the distribution of stored values becomes wide due to cell-to-cell variability in responsiveness

Engineering Contradiction:
Improveprogramming process simplicityVSAvoidprogramming state distribution width
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent segments the memory cell population into multiple groups based on their programming responsiveness characteristics. Different programming pulse patterns are applied to each group, allowing precise control over the programming state distribution while maintaining manageable process complexity through systematic classification.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies different programming pulse patterns to different groups of memory cells based on their local responsiveness characteristics. High-responsiveness cells receive one pattern while low-responsiveness cells receive another, optimizing the programming state distribution for each subgroup rather than using a uniform approach.

Inventive Principle:
Principle #3Local quality

2Productivity

If programming pulses are applied to achieve nominal storage values, then data writing is efficient, but aging-related drift causes read errors due to wide value distributions

Engineering Contradiction:
Improvedata writing efficiencyVSAvoidread error rate
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent performs preliminary classification of memory cells into responsiveness groups before programming. This preliminary action allows the system to apply optimized pulse patterns that pre-compensate for aging-related drift, ensuring that even after retention periods, the programming state distributions remain narrow and well-separated, reducing read errors.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes the programming pulse parameters (amplitude, duration, number of pulses) based on the responsiveness group of each memory cell. This parameter optimization ensures that cells are programmed to target values that account for their individual drift characteristics, maintaining data reliability over time.

Inventive Principle:
Principle #35Parameter changes

3Measurement precision

If high-responsiveness cells are programmed to nominal values, then they achieve target storage levels, but they become susceptible to over-programming and data disturbs

Engineering Contradiction:
Improvetarget storage level accuracyVSAvoidover-programming susceptibility
Core Design Contradiction:
Measurement precisionVSObject-affected harmful factors

Solution Approach 1:

The patent applies a specialized programming pulse pattern specifically to high-responsiveness cells that limits the maximum charge injection, preventing over-programming while still achieving the target storage level. This local optimization protects vulnerable cells from harmful effects.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent preemptively applies a controlled pulse pattern to high-responsiveness cells that prevents over-programming before it can occur. By limiting the programming pulse characteristics for this group, the system pre-compensates for their tendency to exceed target values and become susceptible to data disturbs.

Inventive Principle:
Principle #9Preliminary anti-action

Data Source

PatentUS7864573B2Programming analog memory cells for reduced variance after retention
Publication Date: 2011.01.04 APPLE INC
  • US7864573B2 patent drawing
  • US7864573B2 patent drawing
  • US7864573B2 patent drawing

AI summary

A method includes defining a nominal level of a physical quantity to be stored in analog memory cells for representing a given data value. The given data value is written to the cells in first and second groups of the cells, which have respective first and second programming responsiveness such that the second responsiveness is different from the first responsiveness, by applying to the cells in the first and second groups respective, different first and second patterns of programming pulses that are selected so as to cause the cells in the first and second groups to store respective levels of the physical quantity that fall respectively in first and second ranges, such that the first range is higher than and the second range is lower than the nominal level. The given data value is read from the cells at a later time.