Analog Memory Cell Retention Level Management

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Solution Overview

Problem

The reliability of analog memory cells, such as Flash cells, deteriorates over time due to prolonged retention in an erased state, leading to degradation and reduced storage reliability.

Innovation Solution

Implementing techniques such as setting memory cells to a retention programming level different from the erased state, applying preliminary storage operations like dummy erasure and programming cycles, and managing memory cell blocks in retention and erased pools to minimize prolonged erased state retention, thereby reducing reliability degradation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If memory cells are retained in an erased state for long periods, then storage capacity is maintained and cells are ready for new programming, but reliability deteriorates due to physical media degradation

Engineering Contradiction:
Improvestorage readinessVSAvoidstorage reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies preliminary rejuvenation actions (dummy read operations and selective refresh cycles) to memory cells before they are programmed with new data. This preliminary action restores the physical media of cells that have deteriorated during long erased state retention, ensuring they meet storage quality levels before being reused, thus resolving the contradiction between maintaining storage readiness and preserving reliability

Inventive Principle:
Principle #10Preliminary action

2Reliability

If memory cells are retained in a programmed state for rejuvenation, then reliability is improved, but storage operations are delayed

Engineering Contradiction:
Improvestorage reliabilityVSAvoidrejuvenation time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies partial rejuvenation actions selectively only to memory cells whose physical media has deteriorated below the storage quality level, rather than rejuvenating all cells. This selective approach minimizes the time loss while still improving reliability where needed, resolving the contradiction between reliability improvement and operation speed

Inventive Principle:
Principle #16Partial or excessive action

3Reliability

If dummy read operations are performed on all memory cells, then reliability is improved, but processing time and energy consumption increase

Engineering Contradiction:
Improvestorage reliabilityVSAvoidprocessing efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies different operations to different memory cells based on their individual states. Dummy read operations are performed only on cells that require rejuvenation (those whose physical media has deteriorated), while cells in good condition are left untouched. This localized approach improves reliability where needed without unnecessarily increasing processing time and energy consumption for all cells

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS9455040B2Mitigating reliability degradation of analog memory cells during long static and erased state retention
Publication Date: 2016.09.27 APPLE INC
  • US9455040B2 patent drawing
  • US9455040B2 patent drawing
  • US9455040B2 patent drawing

AI summary

A method in a non-volatile memory, which includes multiple memory cells that store data using a predefined set of programming levels including an erased level, includes receiving a storage operation indicating a group of the memory cells that are to be retained without programming for a long time period. The memory cells in the group are set to a retention programming level that is different from the erased level. Upon preparing to program the group of memory cells with data, the group of memory cells is erased to the erased level and the data is then programmed in the group of memory cells.