Analog In-Memory Signal Processor With Minimal ADC Conversion
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Solution Overview
Problem
Conventional speech processing and analysis in edge devices face significant computational and power consumption burdens, leading to latency issues due to reliance on digital signal processing.
Innovation Solution
A semiconductor device with an integrated analog signal processor utilizing crossbar arrays and minimal ADC usage for efficient processing of analog signals, incorporating circuits for signal processing and machine learning operations like FIR filters, DFT, PCA, ICA, and neural networks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If digital signal processing is used for speech processing and analysis, then computational accuracy is improved, but power consumption and latency increase
Solution Approach 1:
The patent extracts the analog-to-digital conversion step from the traditional digital signal processing pipeline, performing signal processing operations in the analog domain before converting only the final processed results to digital form. This reduces the time signals spend in high-power digital circuits, thereby reducing power consumption and latency while maintaining computational accuracy through selective ADC usage at critical processing stages.
Solution Approach 2:
The patent performs preliminary signal processing operations (such as filtering, feature extraction, and preliminary analysis) in the analog domain before digital conversion. By completing these preprocessing tasks analogously, the system reduces the complexity and computational burden on subsequent digital processing stages, leading to lower overall power consumption and reduced latency.
2Measurement precision
If digital signal processing is used for speech processing and analysis, then computational accuracy is improved, but latency increases
Solution Approach 1:
The patent extracts the analog-to-digital conversion step from the traditional digital signal processing pipeline, performing signal processing operations in the analog domain before converting only the final processed results to digital form. This reduces the time signals spend in high-power digital circuits, thereby reducing power consumption and latency while maintaining computational accuracy through selective ADC usage at critical processing stages.
Solution Approach 2:
The patent replaces traditional digital signal processing mechanisms with analog processing mechanisms for preliminary operations. By using analog circuits to perform filtering, amplification, and initial signal conditioning, the system eliminates the need for frequent analog-to-digital conversions during processing, thereby reducing latency while preserving computational accuracy through subsequent digital analysis of the processed analog signals.
3Use of energy by moving object
If minimal ADC usage is implemented, then power consumption is reduced, but signal processing capability may be limited
Solution Approach 1:
The patent implements a hybrid processing architecture where analog circuits perform multiple functions (filtering, amplification, initial feature extraction) that would traditionally require separate digital processing stages. This multi-functional analog processing reduces the need for numerous ADC conversions, lowering power consumption while maintaining versatile signal processing capability through the combined analog-digital processing pipeline.
Solution Approach 2:
The patent performs preliminary signal processing operations (such as filtering, feature extraction, and preliminary analysis) in the analog domain before digital conversion. By completing these preprocessing tasks analogously, the system reduces the complexity and computational burden on subsequent digital processing stages, leading to lower overall power consumption and reduced latency.
Data Source
AI summary
The present disclosure provides for a semiconductor device with integrated sensing and processing functionalities. The semiconductor device includes a sensing module configured to generate a plurality of analog sensing signals; and a machine learning (ML) processor. The sensing module and the ML processor are fabricated on a single wafer. The ML processor includes crossbar arrays that processes the analog sensing signals to generate analog preprocessed sensing data; an analog-to-digital converter (ADC) to convert the analog preprocessed sensing data into digital preprocessed sensing data; and a machine learning processing unit to process the digital preprocessed sensing data utilizing one or more machine learning model.