Analog Neural Memory Readout for Precise VMM Weight Verification
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Solution Overview
Problem
Existing artificial neural networks face challenges in implementing effective programming, verification, and reading systems for vector-by-matrix multiplication (VMM) arrays, particularly in analog neuromorphic memory systems, due to the need for precise charge storage in non-volatile memory cells and efficient bit coding mechanisms.
Innovation Solution
The development of methods and systems for reading or verifying values stored in selected memory cells in VMM arrays, involving input bits that generate series of input signals applied to memory cells, resulting in digitized output signals shifted and added to indicate the stored value, with embodiments including precise programming techniques for non-volatile memory cells using voltage pulses and calibration algorithms to achieve minimal disturbance across the memory array.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If non-volatile memory cells are used to store precise charge values for neural network weights, then manufacturing precision and reliability are improved, but the complexity of programming and verification systems increases
Solution Approach 1:
The patent segments the programming process into multiple voltage pulse steps with different amplitudes and durations, allowing progressive charge accumulation in the floating gate. This segmentation enables precise weight programming by breaking down complex charge storage into manageable incremental steps, reducing the overall system complexity.
Solution Approach 2:
The patent implements preliminary calibration operations before actual neural network training, where reference memory cells are programmed to establish voltage-to-charge relationships. This preliminary action creates lookup tables and calibration data that simplify subsequent programming operations, reducing the complexity of real-time weight programming during network operation.
2Manufacturing precision
If multiple voltage pulses are applied to program memory cells with precise charge values, then manufacturing precision is improved, but the time required for programming increases
Solution Approach 1:
The patent employs periodic voltage pulse sequences with varying amplitudes and durations to program memory cells. By using periodic actions with different pulse characteristics, the system achieves precise charge storage through repeated cycling, which accelerates programming compared to single-step methods while maintaining weight value precision.
Solution Approach 2:
The patent applies voltage pulses that temporarily exceed the final desired charge level, then uses verification and adjustment pulses to back off to the precise target value. This partial/excessive action approach enables faster initial programming followed by quick corrections, reducing total programming time while maintaining precision.
3Productivity
If memory cells are read by applying voltage signals and measuring output currents, then reading efficiency is improved, but measurement precision may be affected by disturbance to the stored charge
Solution Approach 1:
The patent implements read operations with beforehand cushioning by applying gentle verification voltage pulses that are sufficient to measure the output current but low enough to avoid significant charge loss from the floating gate. This cushioning approach protects the stored charge while enabling efficient reading, maintaining measurement precision without sacrificing reading speed.
Solution Approach 2:
The patent replaces direct high-current measurement methods with voltage-pulse-based read operations that measure output currents indirectly. By substituting the measurement mechanism to use voltage signals and transfer currents rather than direct high-current draws, the system achieves reading efficiency while minimizing disturbance to the stored charge values.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables precise and efficient programming and reading of memory cells in VMM arrays, allowing for continuous and independent tuning of memory states, enhancing the accuracy and energy efficiency of neural network operations.
Implementation Method 1
each of the memory cells includes spaced apart source and drain regions formed in a semiconductor substrate with a channel region extending there between, a floating gate disposed over and insulated from a first portion of the channel region
Implementation Method 2
The plurality of memory cells is configured to multiply the first plurality of inputs by the stored weight values to generate the first plurality of outputs
Data Source
AI summary
Numerous embodiments for reading or verifying a value stored in a selected memory cell in a vector-by-matrix multiplication (VMM) array in an artificial neural network are disclosed. In one embodiment, an input comprises a set of input bits that result in a series of input signals applied to a terminal of the selected memory cell, further resulting in a series of output signals that are digitized, shifted based on the bit location of the corresponding input bit in the set of input bits, and added to yield an output indicating a value stored in the selected memory cell.