Analog Neural Memory Output Blocks for Precise VMM Read Verification
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Solution Overview
Problem
Existing artificial neural networks face challenges in implementing efficient input and output mechanisms for vector-by-matrix multiplication (VMM) arrays, particularly in programming, verifying, and reading non-volatile memory cells.
Innovation Solution
The development of improved input and output blocks for VMM systems, which include mechanisms for precise programming and verification of non-volatile memory cells, enabling continuous and independent programming of memory cells within the VMM array.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If non-volatile memory cells are used for analog neural memory in VMM arrays, then energy efficiency and computational parallelism are improved, but programming precision and verification capability deteriorate
Solution Approach 1:
The patent segments the programming process into multiple discrete steps with intermediate verification points. The output block divides the memory array into selectable regions and processes different groups of memory cells in sequence, allowing precise control and verification at each stage rather than attempting to program all cells simultaneously.
Solution Approach 2:
The patent implements feedback mechanisms where the output block reads and verifies the state of programmed memory cells, then uses this information to guide subsequent programming operations. This closed-loop approach ensures that programming precision is maintained even as energy efficiency is improved through analog computation.
2Use of energy by moving object
If non-volatile memory cells are used for analog neural memory in VMM arrays, then energy efficiency and computational parallelism are improved, but the ability to read and verify memory cell states deteriorates
Solution Approach 1:
The patent introduces an output block as an intermediary component between the memory cell array and the external system. This output block contains dedicated circuitry for reading and verifying memory cell states, acting as a buffer that simplifies the complex task of measurement and verification while maintaining energy efficiency in the core computation array.
Solution Approach 2:
The patent performs preliminary verification of memory cell programming before final use in computation. The output block can read and validate the state of programmed cells in advance, ensuring that only properly programmed cells are used in subsequent analog computations, thereby improving overall system reliability without compromising energy efficiency.
3Productivity
If multiple memory cells are programmed simultaneously in VMM arrays, then productivity is improved, but programming precision and individual cell control worsen
Solution Approach 1:
The patent segments the memory array into multiple independently controllable groups through the output block. This allows simultaneous programming of different cell groups with independent control parameters, maintaining both high productivity through parallel operations and high precision through group-specific optimization.
Solution Approach 2:
The patent implements dynamic control where the output block can adjust programming parameters in real-time based on the specific requirements of different memory cell groups. This dynamic adaptation allows the system to optimize for speed when programming certain groups and for precision when programming others, achieving both high productivity and high manufacturing precision.
Data Source
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AI summary
Numerous embodiments for reading or verifying a value stored in a selected non-volatile memory cell in a vector-by-matrix multiplication (VMM) array in an artificial neural network are disclosed. The embodiments comprise various designs of input blocks for applying inputs to the VMM array during a read or verify operation and various designs of output blocks for receiving outputs from the VMM array during the read or verify operation.