Precision Programming Circuit for Analog Neural Memory Weights
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Solution Overview
Problem
Existing artificial neural networks face challenges in accurately programming non-volatile memory cells in analog neural memories due to the need for precise and specific charge storage on floating gates, which is difficult to achieve with existing CMOS-implemented synapses.
Innovation Solution
The use of non-volatile memory arrays with CMOS technology allows for individual and precise programming of memory cells, enabling continuous and minimal disturbance changes in charge levels, facilitating precise tuning of synapse weights in neural networks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If non-volatile memory cells are used to store synapse weights in analog neural memory, then energy consumption is reduced and precision is improved, but the difficulty of programming individual cells to precise charge levels increases
Solution Approach 1:
The programming process is divided into multiple discrete steps, each applying a specific voltage level to achieve incremental charge changes. The programming voltage is segmented into different levels (e.g., Vprog1, Vprog2, Vprog3) that can be applied in sequence to precisely control the charge on the floating gate, enabling fine-grained adjustment of synapse weights.
Solution Approach 2:
Before final programming, reference memory cells are pre-programmed to specific charge levels that correspond to desired synapse weight values. These reference cells serve as templates that guide the programming of actual synapse memory cells, ensuring accurate charge storage without requiring complex real-time control during programming.
Solution Approach 3:
The programming process incorporates verification steps where the charge level on the floating gate is measured and compared against target values. Based on this feedback, additional programming pulses are applied if necessary to achieve the precise charge level required for accurate synapse weight representation.
2Adaptability or versatility
If digital supercomputers or GPU clusters are used to achieve high computational parallelism, then connectivity between neurons is improved, but energy efficiency deteriorates
Solution Approach 1:
The patent replaces digital computational mechanics with analog electrical mechanics. Instead of using digital circuits to perform multiplication and addition operations, the system uses analog memory cells where conductance values directly represent synapse weights. Current flowing through these cells naturally performs weighted summation, eliminating the need for separate computational logic circuits and significantly reducing energy consumption while maintaining high connectivity.
Solution Approach 2:
The patent merges the functions of synaptic weight storage and synaptic computation into a single integrated structure. The non-volatile memory cells simultaneously store synapse weights (in the form of charge on floating gates) and perform computational operations (through conductance-based current modulation), eliminating the need for separate memory and computation units and improving energy efficiency.
Data Source
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AI summary
Various embodiments of high voltage generation circuits, high voltage operational amplifiers, adaptive high voltage supplies, adjustable high voltage incrementor, adjustable reference supplies, and reference circuits are disclosed. These circuits optionally can be used for programming a non-volatile memory cell in an analog neural memory to store one of many possible values.