Analog Level Meter Using Duty Ratio Feedback

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Solution Overview

Problem

Conventional analog level meters require an analog to digital converter (ADC) to measure signal levels, which can fail when the signal frequency exceeds the sampling frequency, necessitating adjustments that increase layout area and component count.

Innovation Solution

An analog level meter using a duty ratio that compares an analog signal with a reference voltage, counts duty values, and adjusts through a digital to analog converter (DAC) to detect peak/bottom levels without an ADC, employing a comparator, duty counter, and analog level detector.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If an ADC is used to measure signal levels, then signal level measurement is enabled, but layout area and component count increase

Engineering Contradiction:
Improvesignal level measurementVSAvoidlayout area
Core Design Contradiction:
Measurement precisionVSArea of stationary object

Solution Approach 1:

The patent extracts the ADC component from the signal level measurement system and replaces it with a duty ratio-based measurement approach using a comparator, counter, and DAC. This removes the problematic ADC while preserving the essential measurement functionality through a different technical mechanism.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent creates a functional copy of the ADC's measurement capability using a duty ratio measurement system. Instead of directly converting analog to digital, the system copies the measurement function by comparing the analog signal with a reference voltage and measuring the duty ratio of the comparison output, achieving equivalent measurement results without the ADC hardware.

Inventive Principle:
Principle #26Copying

2Measurement precision

If an ADC is used to measure signal levels, then signal level measurement is enabled, but device complexity increases

Engineering Contradiction:
Improvesignal level measurementVSAvoidcomponent count
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent removes the ADC component from the device architecture and replaces it with a combination of simpler components: a comparator for voltage comparison, a counter for duty ratio measurement, and a DAC for reference voltage generation. This extraction eliminates the complex ADC while maintaining measurement functionality.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent segments the signal level measurement function into multiple independent sub-functions: voltage comparison (comparator), duty ratio counting (counter), and reference voltage generation (DAC). Each sub-function is implemented by a separate, simpler component, reducing overall device complexity compared to using a single ADC.

Inventive Principle:
Principle #1Segmentation

3Reliability

If offset control and gain control units are added to adjust signal level, then ADC operation is improved, but layout area increases

Engineering Contradiction:
ImproveADC operationVSAvoidlayout area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent implements self-service by having the measurement system automatically adjust the reference voltage level through DAC control based on duty ratio feedback. The system self-regulates the comparison level without requiring external offset control units or gain control units, eliminating the need for additional adjustment components and their associated layout area.

Inventive Principle:
Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enables accurate detection of analog signal levels without an ADC, reducing apparatus size and cost, minimizing noise and offset, and simplifying level measurement by setting target voltages and clock periods.

Implementation Method 1

the comparator may compare a voltage level of an analog signal with a reference voltage and generate an up-down signal

Methodology Applied
Scientific EffectVoltage comparison:

Implementation Method 2

The duty counter may count a duty value of the up-down signal

Methodology Applied
Scientific EffectDuty cycle measurement:

Implementation Method 3

The DAC may convert the duty error value into another analog signal with a corresponding voltage level and output the converted another analog signal as the reference voltage by feedback

Methodology Applied
Scientific EffectDigital to analog conversion:

Data Source

PatentUS7382309B2Analog level meter and method of measuring analog signal level
Publication Date: 2008.06.03 SAMSUNG ELECTRONICS CO LTD
  • US7382309B2 patent drawing
  • US7382309B2 patent drawing
  • US7382309B2 patent drawing

AI summary

An analog level meter and a method of measuring an analog signal level may be provided. The analog level meter may include a comparator, a duty counter, an analog level detector and/or a digital to analog converter (DAC). The comparator may compare a voltage level of the analog signal with a reference voltage and generate an up-down signal. The duty counter may count a duty value of the up-down signal. The analog level detector may output a duty error value obtained by subtracting a target duty value from the duty value of the up-down signal. The analog level meter may output the reference voltage as a measured value of the analog signal when the duty error value is a desired or predetermined value.