Analog Information Model for Mixed-Signal Net Simulation
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Solution Overview
Problem
Computer aided design (CAD) packages struggle to effectively handle mixed analog and digital circuit designs due to the inability to accurately model and simulate analog circuits, which are typically modeled with continuous waveforms, while digital circuits are processed sequentially.
Innovation Solution
An analog information model (AIM) system is developed to integrate with digital circuit simulation systems, allowing for the modeling of analog circuits within a mixed design by defining a net interface and properties, and providing methods to determine voltage and current through nets, combining circuit elements, and handling complex scenarios like capacitive loads and multiple power supplies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If digital circuits are processed sequentially one component at a time, then processing efficiency is improved, but simulation accuracy of analog circuits deteriorates
Solution Approach 1:
The patent segments the circuit simulation into two distinct processing modes: sequential processing for digital circuit components and simultaneous processing for analog circuit components. This segmentation allows each type of circuit to be processed according to its specific requirements, maintaining both processing efficiency for digital circuits and simulation accuracy for analog circuits.
Solution Approach 2:
The patent implements dynamic processing by allowing the simulation system to switch between sequential and simultaneous processing modes based on the circuit type being simulated. The system dynamically identifies whether components are digital or analog and applies the appropriate processing method, thereby optimizing both efficiency and accuracy for different circuit segments.
2Measurement precision
If analog circuits are simulated simultaneously with all connected components, then simulation accuracy is improved, but processing time increases
Solution Approach 1:
The patent divides the overall simulation process into separable segments: digital circuit simulation executed sequentially and analog circuit simulation executed simultaneously. This segmentation prevents the unnecessary application of simultaneous processing to entire circuits, reducing processing time while maintaining accuracy where needed.
Solution Approach 2:
The patent applies simultaneous processing only partially - specifically to analog circuit components that require it - rather than applying it excessively to all circuit components. This partial application of simultaneous processing maintains simulation accuracy for analog portions while avoiding the processing time penalty for digital portions that don't require it.
3Ease of operation
If CAD packages use standard digital design tools like Verilog, then ease of operation is improved, but capability to handle analog circuits deteriorates
Solution Approach 1:
The patent creates a universal simulation platform that can handle both digital and analog circuits within a single CAD package. By integrating Verilog-based digital circuit simulation with analog circuit simulation capabilities, the system achieves multi-functionality, allowing users to simulate mixed-signal circuits without switching between different tools, thereby maintaining ease of operation while improving versatility.
Data Source
AI summary
A computer-implemented method is provided including instantiating an object of an analog information model object class definition defining a net interface to a net defined in a simulated digital circuit, and a plurality of analog circuit properties. The method includes connecting the net interface of the data structure to a first net defined in a digital circuit simulation and identifying all other instances of the AIM object class definition connected to the first net defined in the digital circuit simulation of a simulated digital circuit and determining an analog voltage at and current through the first net based on the analog circuit properties of all instances connected to the first net.


