Analog MOS Transistor Well Structure for Low-Noise Threshold Stability
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Solution Overview
Problem
Existing microelectronic devices face challenges in achieving low noise, precise thresholds, and long-term stability in analog circuits, particularly due to limitations in the design of metal oxide semiconductor (MOS) transistors.
Innovation Solution
The development of a microelectronic device featuring an analog MOS transistor with a body well and drain/source wells extending deeper into the substrate than the field relief dielectric layer, along with a gate on a gate dielectric layer, to enhance performance and stability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If MOS transistors are designed for analog circuits with traditional structures, then device complexity is reduced, but noise performance, threshold precision, and long-term stability deteriorate
Solution Approach 1:
The transistor structure is segmented into distinct regions: a body well extending to a first depth, source/drain wells extending to a second depth greater than the body well, and a field relief dielectric layer positioned at a third depth between the body well and source/drain wells. This segmentation allows each region to be independently optimized for its specific function, improving overall analog performance while managing complexity through modular design.
Solution Approach 2:
The patent introduces a vertical dimensionality change by creating wells at different depths within the substrate. The body well, source/drain wells, and field relief dielectric layer are positioned at different vertical levels (first depth, second depth, and third depth respectively), transforming a two-dimensional planar structure into a three-dimensional multi-level structure that enhances analog performance.
2Manufacturing precision
If simple well structures are used, then manufacturing precision requirements are reduced, but breakdown voltage control and noise performance deteriorate
Solution Approach 1:
Different regions of the transistor are given different depths and properties: the body well extends to a first depth, source/drain wells extend to a greater second depth, and a field relief dielectric layer is positioned at a third depth. This local differentiation of well depths and dielectric positioning allows precise control of breakdown voltage and noise characteristics in specific regions without requiring high precision across the entire structure.
Solution Approach 2:
A field relief dielectric layer is introduced as an intermediary element positioned between the body well and source/drain wells at a third depth. This dielectric layer acts as a mediator that controls the electric field distribution, stabilizes breakdown voltage, and improves noise performance without requiring extremely precise control of the well depths themselves.
3Reliability
If deep wells are used to improve stability, then long-term stability and threshold precision are improved, but device complexity and manufacturing difficulty increase
Solution Approach 1:
The deep well structure is segmented into multiple levels: a body well at a first depth, source/drain wells at a second depth greater than the body well, and a field relief dielectric layer at a third depth. This segmentation allows the deep structure to be fabricated using standard multi-step well formation processes, making the complex three-dimensional structure manufacturable with existing technology.
Solution Approach 2:
The field relief dielectric layer is positioned in advance at a third depth between the body well and source/drain wells before final transistor operation. This preliminary positioning of the dielectric layer pre-establishes the electric field control mechanism, ensuring long-term stability and threshold precision without requiring complex real-time adjustments during manufacturing or operation.
Data Source
AI summary
A microelectronic device including an analog MOS transistor. The analog transistor has a body well having a first conductivity type in a semiconductor material of a substrate of the microelectronic device. The body well extends deeper in the substrate than a field relief dielectric layer at the top surface of the semiconductor material. The analog transistor has a drain well and a source well having a second, opposite, conductivity type in the semiconductor material, both contacting the body well. The drain well and the source well extend deeper in the substrate than the field relief dielectric layer. The analog transistor has a gate on a gate dielectric layer over the body well. The drain well and the source well extend partway under the gate at the top surface of the semiconductor material.