Analog Multiplexer Body Biasing for Low-Leakage Current Injection
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Solution Overview
Problem
Analog multiplexers face challenges in handling current injection, which degrades the accuracy of analog-to-digital converters (ADCs) and causes errors in adjacent channels due to high leakage current and noise coupling, especially as CMOS transistor geometries shrink and safe operating voltages decrease.
Innovation Solution
The implementation of contesting well biasing in analog multiplexers to handle both positive and negative current injection by using protection circuits that dissipate or source injected current, keeping N-type and P-type hardening devices small to minimize leakage and noise coupling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If larger geometry transistors are used in I/O circuits to protect from excessive voltages, then device protection is improved, but leakage current increases
Solution Approach 1:
The I/O circuit is segmented into multiple functional blocks: input protection circuitry, level shifting circuitry, and internal logic circuits. Each segment handles specific voltage levels and current paths, allowing protection functionality to be distributed rather than concentrated in large transistors alone, thereby reducing overall leakage while maintaining protection capability.
Solution Approach 2:
Level shifting circuitry acts as an intermediary between external high-voltage signals and internal low-voltage logic. This intermediary stage translates voltage levels and isolates the internal circuits from direct exposure to excessive voltages, enabling the use of smaller transistors in internal circuits while still providing robust protection against voltage spikes and current injection.
2Reliability
If larger geometry transistors are used to handle current injection, then current handling capability is improved, but noise coupling increases
Solution Approach 1:
Current handling functionality is segmented across multiple smaller transistor circuits rather than relying on a single large transistor. The input protection circuitry and level shifting circuitry are divided into separate stages, each handling portions of the current injection event, which distributes and reduces noise coupling compared to concentrated large-transistor handling.
Solution Approach 2:
The level shifting circuitry serves as an intermediary that isolates internal analog circuits from external current injection events. By translating voltage levels and providing electrical isolation, this intermediary stage protects sensitive internal circuits from noise coupling while still allowing the I/O interface to handle specified current injection levels.
3Reliability
If larger geometry transistors are used in I/O circuits, then voltage protection is improved, but ADC accuracy deteriorates
Solution Approach 1:
The system is segmented into protected I/O interface circuits and sensitive ADC circuits. The input protection circuitry and level shifting stage form a buffer zone that shields the ADC from voltage fluctuations and current injection events, allowing the ADC to operate with high precision while the interface circuits handle voltage protection duties.
Solution Approach 2:
Level shifting circuitry acts as an intermediary buffer between the external I/O interface and the internal ADC. This intermediary stage isolates the ADC from voltage transients and current injection events by providing electrical isolation and voltage level translation, thereby maintaining ADC accuracy while still providing robust voltage protection at the interface.
Data Source
AI summary
A multi-branch analog multiplexer (anamux) includes protection circuitry to help dissipate both positive and negative injected current without increasing the size of hardening transistors in each branch, thereby avoiding increased leakage current and enabling an analog to digital converter to operate with the required accuracy. The protection circuitry is tied to the body of the hardening transistor to lower the threshold voltage of the hardening device, thereby enabling the hardening device to handle more of the injected current.

