Analog MUX Shared Buffer Layout for High-Voltage Linearity

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Solution Overview

Problem

Existing analog multiplexers face challenges in handling high input voltages while maintaining linearity, as they require large and complex buffer designs for overvoltage protection, which increases circuit area and costs, limiting the number of feasible inputs.

Innovation Solution

Implementing a shared common buffer that provides a buffered output to each analog switch's bootstrap circuit, eliminating the need for individual buffers and allowing the multiplexer to handle input voltages exceeding the transistor rating without increasing circuit area.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a buffer is added for each analog input to provide overvoltage protection and maintain linearity, then the ability to handle input voltages greater than transistor rating is improved, but the circuit area and complexity increase significantly

Engineering Contradiction:
Improveovervoltage protection capabilityVSAvoidbuffer design complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the buffer functionality into a shared common structure that serves all analog inputs simultaneously. Instead of having separate buffers for each input, a single common buffer is used to provide buffered versions of all input voltages to the respective bootstrap circuits, thereby reducing overall circuit area and complexity while maintaining overvoltage protection capability.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The common buffer structure performs multiple functions: it provides overvoltage protection for all inputs, maintains linearity across all channels, and reduces the total number of components required. This universal approach allows the same buffer architecture to serve all analog inputs rather than requiring dedicated buffers for each channel.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Manufacturing precision

If individual buffers are provided for each analog input, then linearity is maintained through constant gate-to-source voltage, but the circuit area increases limiting the number of feasible inputs

Engineering Contradiction:
ImprovelinearityVSAvoidcircuit area
Core Design Contradiction:
Manufacturing precisionVSArea of stationary object

Solution Approach 1:

The patent combines multiple buffer functions into a single common buffer structure that serves all analog inputs. This shared buffer approach maintains the necessary gate-to-source voltage for linearity in each channel while significantly reducing the total circuit area compared to having individual buffers for each input.

Inventive Principle:
Principle #5Merging (Combining)

3Area of stationary object

If the bootstrap circuit receives the selected input voltage directly, then the circuit area is reduced, but unwanted parasitics and leakage are introduced degrading linearity

Engineering Contradiction:
Improvecircuit areaVSAvoidlinearity
Core Design Contradiction:
Area of stationary objectVSManufacturing precision

Solution Approach 1:

The patent introduces a common buffer as an intermediary between the analog inputs and the bootstrap circuits. This buffer provides buffered versions of the input voltages, eliminating direct connections that would introduce parasitics and leakage. The intermediary buffer structure maintains signal integrity and linearity while allowing area-efficient implementation.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS11979151B2Integrated circuit (IC) having an analog multiplexer (MUX)
Publication Date: 2024.05.07 NXP USA INC
  • US11979151B2 patent drawing
  • US11979151B2 patent drawing
  • US11979151B2 patent drawing

AI summary

An integrated circuit includes a plurality of analog inputs, and an analog multiplexer (MUX). The MUX includes a common output node configured to provide a MUX output, a plurality of analog switches, and a shared buffer. Each switch includes a corresponding bootstrap circuit coupled to a control electrode of a corresponding pass transistor in which the corresponding bootstrap circuit includes a corresponding boosting capacitor. Each analog switch of the plurality of analog switches has a first input coupled to a corresponding analog input of the plurality of analog inputs, a second input, and an output coupled to the common output node. The shared buffer has an input coupled to the common output node and coupled to provide a common buffered MUX output to the second input of each of the plurality of analog switches.