Decoding System for Redundant Analog Neural Memory Access

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Solution Overview

Problem

Existing analog neural memory systems lack an effective decoding system to provide redundancy during programming, erase, read, and neural read operations, especially when multiple faulty rows or columns occur.

Innovation Solution

The proposed solution involves a decoding system that allows access to redundant non-volatile memory cells in place of faulty rows or columns, enabling simultaneous activation of all redundant rows or columns during neural read operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If conventional decoding systems are used, then individual row or column access is enabled, but simultaneous activation of all redundant rows or columns during neural read operations is not supported

Engineering Contradiction:
Improvesupport for neural read operationsVSAvoidfault tolerance
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The decoding system dynamically switches between conventional decoding mode (for individual row/column access) and neural read mode (for simultaneous activation of all redundant rows/columns). The system adapts its decoding behavior based on the operation type, enabling both conventional and neural read operations with appropriate redundancy handling for each mode.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The decoding system is designed to perform multiple functions: it can decode individual row/column addresses for conventional operations and simultaneously activate all redundant rows/columns for neural read operations. This multi-functional decoding approach allows a single system to support both conventional memory access patterns and neural network inference requirements.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If redundant rows or columns are activated during neural read operations, then fault tolerance is improved, but decoding complexity increases

Engineering Contradiction:
Improvefault toleranceVSAvoiddecoding system complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The decoding system is segmented into distinct decoding paths: one for conventional individual row/column access and another for neural read operations that activate all redundant rows/columns. This segmentation allows the system to handle different operation types with specialized decoding logic, managing complexity through functional separation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system performs preliminary identification of faulty rows or columns during manufacturing testing, storing this information in a redundancy map. During neural read operations, this pre-stored information is used to automatically activate the appropriate redundant rows or columns without requiring complex real-time decision-making, thereby reducing operational decoding complexity.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If multiple faulty rows or columns occur, then system reliability decreases, but the need for comprehensive redundancy increases

Engineering Contradiction:
Improveoperational reliabilityVSAvoidredundancy management complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The system creates redundant copies of rows or columns during manufacturing testing and stores their addresses in a redundancy map. When faulty rows or columns are identified, pre-configured redundant copies are activated to replace them. This copying approach allows the system to handle multiple faults by having prepared backup resources available for immediate activation.

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The decoding system uses feedback from the redundancy map (populated during manufacturing testing) to automatically determine which redundant rows or columns to activate when faults are detected. This feedback mechanism enables the system to adapt to multiple faulty elements by referencing pre-stored redundancy information, simplifying the management of comprehensive redundancy.

Inventive Principle:
Principle #23Feedback

Data Source

PatentEP4206992B1Redundant memory access for rows or columns containing faulty memory cells in analog neural memory in deep learning artificial neural network
Publication Date: 2025.02.12 SILICON STORAGE TECHNOLOGY INC
  • EP4206992B1 patent drawingFigure 1
  • EP4206992B1 patent drawingFigure 2
  • EP4206992B1 patent drawingFigure 3

AI summary

Numerous embodiments are disclosed for accessing redundant non-volatile memory cells in place of one or more rows or columns containing one or more faulty non-volatile memory cells during a program, erase, read, or neural read operation in an analog neural memory system used in a deep learning artificial neural network.