Analog Neural Memory Input Circuitry for Precise Synapse Weight Tuning
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Solution Overview
Problem
The development of artificial neural networks for high-performance information processing is hindered by a lack of adequate hardware technology, particularly in terms of energy efficiency and the high computational complexity required for large numbers of synapses, which existing CMOS-implemented synapses fail to address effectively.
Innovation Solution
Utilizing non-volatile memory arrays as synapses in artificial neural networks, enabling individual programming, erasing, and reading of memory cells with minimal disturbance, and allowing for continuous analog programming to achieve precise tuning of synapse weights.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If digital supercomputers or specialized graphics processing unit clusters are used to achieve high connectivity between neurons, then computational parallelism is improved, but energy efficiency deteriorates
Solution Approach 1:
The patent replaces digital computational systems (supercomputers, GPUs) with an analog neural network system using non-volatile memory arrays. The memory array directly performs analog multiplication and addition operations through electrical conductance, eliminating the need for digital computation cycles and significantly reducing energy consumption while maintaining high computational parallelism
Solution Approach 2:
The non-volatile memory array serves multiple functions simultaneously: it stores synapse weights, performs analog multiplication of inputs by weights, and sums the results to produce neuron outputs. This multi-functionality eliminates the need for separate multiplication and addition logic circuits, improving energy efficiency while maintaining computational capability
2Use of energy by moving object
If CMOS analog circuits are used for artificial neural networks, then energy efficiency is improved, but device area increases due to bulky synapse implementations
Solution Approach 1:
Each non-volatile memory cell functions as a complete synapse unit that simultaneously stores weight information and performs analog computation. The memory cell's conductance state represents the synapse weight, and the same cell structure is used for both storage and computation, eliminating the need for separate bulky CMOS analog circuitry and reducing device area
Solution Approach 2:
The patent uses the electrical conductance parameter of non-volatile memory cells to represent synapse weights, allowing continuous analog values to be stored in a compact form. This parameter-based representation enables high-precision weight storage without requiring large physical dimensions, achieving both energy efficiency and compact device area
Data Source
AI summary
Numerous embodiments of input circuitry for an analog neural memory in a deep learning artificial neural network are disclosed.