Analog Neural Network Circuits With Reconfigurable Resistor Weights
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Solution Overview
Problem
Conventional hardware realization of neural networks is limited by power consumption, computational speed, and the high cost of reconfigurable hardware, as well as the inefficiency of reprogramming mechanisms, which leads to increased costs and complexity in retraining processes.
Innovation Solution
Analog circuits using resistors and amplifiers are modeled and manufactured to represent neural network weights, allowing for efficient reprogramming by adjusting the resistance of specific resistors based on retraining, reducing the need for full hardware remanufacturing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If conventional digital microprocessor architectures are used to realize neural networks, then computational power can be maintained, but power consumption increases and computational speed plateaus
Solution Approach 1:
The patent replaces digital computational systems with analog electrical systems. Neural network weights are implemented as physical resistor values, and computations are performed through natural electrical current flow and voltage division, eliminating the need for digital arithmetic operations. This substitution of mechanical/digital systems with analog electrical systems achieves both low power consumption and high computational speed.
Solution Approach 2:
The patent changes the fundamental parameter representation from digital binary values to continuous analog electrical parameters (voltage, current, resistance). By using continuous analog signals and varying resistor values to represent weights, the system achieves higher computational efficiency and lower power consumption compared to discrete digital systems.
2Reliability
If neural networks are retrained with new data, then model accuracy improves, but hardware must be re-manufactured which increases costs
Solution Approach 1:
The patent introduces dynamic reconfigurability to the analog hardware system. Resistors can be replaced or reconfigured using programmable elements such as switch arrays or memory cells that can change their resistance values after manufacturing. This dynamic capability allows the hardware to be retrained and adapted to new tasks without complete remanufacturing, reducing costs while maintaining model accuracy.
Solution Approach 2:
The patent segments the hardware into fixed analog computation cores and reconfigurable weight storage elements. The analog circuitry performing computations remains fixed and mass-producible, while only the weight values stored in reconfigurable elements need to be changed during retraining. This segmentation allows efficient reprogramming without requiring complete hardware remanufacturing.
3Speed
If data transmission speed is increased to improve GPU-like architecture performance, then computational speed improves, but power consumption increases significantly
Solution Approach 1:
The patent eliminates the need for high-speed digital data transmission by performing computations directly in the analog domain where data remains as electrical signals throughout the processing pipeline. This substitution of digital transmission with analog processing removes the power consumption bottleneck associated with converting and transmitting digital data between processing units.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach provides improved performance per watt, reduces retraining time and costs, and enables efficient reprogramming of neural networks without requiring extensive hardware reconfiguration, suitable for edge environments and applications like drone navigation and autonomous cars.
Implementation Method 1
The first resistor includes at least one photo resistor, which is configured to be exposed to light from a controllable source of light. The variable resistance of the first resistor depends on the brightness level of the controllable source of light.
Data Source
AI summary
Systems, devices, integrated circuits, and methods are provided for analog hardware realization of neural networks. An electronic device includes a plurality of resistors corresponding to a plurality of weights of a neural network and one or more amplifiers coupled to the plurality of resistors. The plurality of resistors includes a first resistor corresponding to a first weight of the neural network. The one or more amplifiers and the plurality of resistors are configured to form a neural network circuit associated with the neural network. In some embodiments, the electronic device includes a combination circuit corresponding to a neuron of the neural network and configured to: (i) obtain two or more input signals at the two or more input interfaces, (ii) combine the two or more input signals, and (iii) generate an output.