Analog Offset Cancellation Circuit With Continuous DC Feedback

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Solution Overview

Problem

High-speed multi-stage amplifier circuits in wired communication receivers face challenges in canceling offset voltages due to manufacturing mismatches, leading to errors and performance limitations, particularly in real-time offset fluctuations.

Innovation Solution

An analog offset cancellation circuit comprising a multi-stage amplifier, a comparator, a digital-to-analog converter (DAC), and a feedback loop circuit that continuously adjusts control voltages to equalize DC levels of output voltages, ensuring continuous offset cancellation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a digital offset calibration structure is used to remove the output offset of the multi-stage amplifier, then the DC offset can be canceled, but it is difficult to perform verification through simulation and offset fluctuations that change in real time cannot be compensated

Engineering Contradiction:
Improveoffset cancellation accuracyVSAvoidreal-time offset compensation capability
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The patent employs a feedback loop circuit that continuously monitors the output of the multi-stage amplifier and adjusts the offset cancellation voltage in real-time. The feedback loop includes an operational amplifier that compares the actual output voltage with the expected voltage and generates a correction signal to compensate for offset fluctuations, enabling continuous adaptation to changing conditions

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent transitions from a static digital calibration approach to a dynamic analog feedback mechanism. The feedback loop circuit with operational amplifiers and capacitors creates a continuous adjustment system that adapts to real-time offset variations, making the offset cancellation capability dynamic rather than fixed

Inventive Principle:
Principle #15Dynamics

2Productivity

If a multi-stage amplifier structure is used to implement high-gain amplifiers operating at high speed, then the amplification capability is improved, but DC offset is introduced due to mismatch caused by manufacturing variations

Engineering Contradiction:
Improveamplification speed and gainVSAvoidDC offset level
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent extracts and separates the offset cancellation function from the main amplification path by introducing a dedicated feedback loop circuit. This separate circuit specifically targets and removes the DC offset component without interfering with the high-speed amplification function, allowing the multi-stage amplifier to operate at high speed while the feedback loop continuously cleans up the offset

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The feedback loop circuit acts as an intermediary between the multi-stage amplifier output and the final output. It introduces correction voltages through operational amplifiers and capacitors that mediate the signal path, canceling offset while preserving the high-speed amplification characteristics

Inventive Principle:
Principle #24Intermediary (Mediator)

3Ease of manufacture

If calibration is performed before operation of the multi-stage amplifier, then initial offset can be canceled, but offset fluctuations that change in real time cannot be compensated

Engineering Contradiction:
Improvecalibration process simplicityVSAvoidreal-time adaptation to offset changes
Core Design Contradiction:
Ease of manufactureVSAdaptability or versatility

Solution Approach 1:

The patent implements continuous offset cancellation through the feedback loop that operates throughout the amplifier's operation. Rather than performing calibration only once before operation, the feedback loop continuously monitors and adjusts offset compensation, maintaining accurate performance over time and across varying conditions

Inventive Principle:
Principle #20Continuity of useful action

Data Source

PatentUS20240186968A1Analog offset cancellation circuit and operating method
Publication Date: 2024.06.06 SAMSUNG ELECTRONICS CO LTD
  • US20240186968A1 patent drawing
  • US20240186968A1 patent drawing
  • US20240186968A1 patent drawing

AI summary

An offset cancellation circuit includes; a multi-stage amplifier including first and second amplifiers and configured to receive first and second input voltages and generate first and second output voltages, a comparator configured to compare the first and second output voltages, a digital to analog converter (DAC) configured to provide an offset cancellation voltage to the comparator during an offset cancellation operation for the comparator, and a feedback loop circuit configured to generate first and second control voltages in response to at least one DC level associated with the first and second output voltages and apply the first and second control voltages to the multi-stage amplifier to continuously cancel a DC offset of the multi-stage amplifier following the offset cancellation operation.