Analog Page Buffer Circuit for Memory Plane Scaling
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Solution Overview
Problem
The expansion of memory devices is hindered by the increasing size of page buffer circuits, which occupy significant space and hinder the addition of additional memory planes, as each plane requires eight pages of 64 kilobytes, leading to a substantial increase in page buffer area.
Innovation Solution
The use of a single analog memory element to replace multiple digital memory elements in the page buffer circuit, allowing it to store multiple analog voltage values corresponding to digital states, with digital-to-analog and analog-to-digital converters to facilitate data conversion, thereby reducing the physical space required for page buffer circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple digital memory elements are used in the page buffer circuit to store data, then the reliability and data storage capability are improved, but the area occupied by the page buffer circuit increases significantly
Solution Approach 1:
The patent merges multiple digital memory elements into a single analog memory element that can store multiple analog voltage values. This consolidation reduces the number of separate components while maintaining data storage capability, directly addressing the area occupation problem without sacrificing reliability
Solution Approach 2:
The patent changes the storage parameter from discrete digital states to continuous analog voltage values. By storing data as analog voltage levels rather than digital binary states, the system can represent multiple data states within a single memory element, thereby reducing the overall circuit area while preserving data storage functionality
2Adaptability or versatility
If the page buffer circuit area is reduced to enable memory device expansion, then the adaptability for adding memory planes is improved, but the risk of data loss or insufficient buffering capacity increases
Solution Approach 1:
The patent employs analog voltage value storage with associated voltage level information to maintain data integrity. By preserving the analog nature of the data and its voltage levels, the system ensures accurate data retrieval and conversion, thereby maintaining reliability even with reduced buffer circuit area
Solution Approach 2:
The patent replaces the traditional digital memory element mechanism with an analog memory element system. This substitution enables more efficient use of space while maintaining data retention capability through the use of analog voltage storage and conversion mechanisms
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the page buffer area by 40-50% without incurring additional latency or performance degradation, enabling the growth of memory arrays without the burden of excessive page buffer overhead.
Implementation Method 1
an analog memory element coupled to the digital-to-analog converter
Data Source
AI summary
A device includes a memory array and a sense amplifier (SA), which receives bits of data over an input/output (I/O) data line in association with a program operation. A digital-to-analog converter (DAC) is to convert the bits of data to an analog voltage value. A first analog memory element is coupled with the DAC. A pre-charge transistor is coupled with a voltage supply and the first analog memory element, the pre-charge transistor to charge the first analog memory element to an initial voltage level. A second analog memory element is coupled in parallel with the first analog memory element. Transistor logic is coupled between the first analog memory element and the second analog memory element and to selectively enable the second analog memory element to consume charge from the first analog memory element until the first analog memory element stores the analog voltage value.